
ix
14.4 Registers of 8-Bit Serial I/O ............................................................................................................... 325
14.4.1 Serial Mode Register (SMR) ......................................................................................................... 326
14.4.2 Serial Data Register (SDR) .......................................................................................................... 330
14.5 8-Bit Serial I/O Interrupt ..................................................................................................................... 331
14.6 Explanation of Operations of Serial Output Functions ....................................................................... 332
14.7 Explanation of Operations of Serial Input Functions .......................................................................... 335
14.8 8-Bit Serial I/O Operation in each Mode ............................................................................................ 337
14.9 Notes on Using 8-Bit Serial I/O ........................................................................................................ 341
14.10 Example of 8-Bit Serial I/O Connection ............................................................................................. 342
14.11 Program Example for 8-Bit Serial I/O ................................................................................................ 344
CHAPTER 15 BUZZER OUTPUT .................................................................................... 347
15.1 Overview of the Buzzer Output .......................................................................................................... 348
15.2 Configuration of the Buzzer Output ................................................................................................... 349
15.3 Pin of the Buzzer Output .................................................................................................................... 350
15.4 Buzzer Register (BZCR) .................................................................................................................... 352
15.5 Program Example for Buzzer Output ................................................................................................. 354
CHAPTER 16 WILD REGISTER FUNCTIONS ................................................................ 355
16.1 Overview of the Wild Register Function ............................................................................................. 356
16.2 Configuration of the Wild Register Function ...................................................................................... 357
16.3 Registers of the Wild Register Function ............................................................................................ 359
16.3.1 Data Setting Registers (WRDR0 and WRDR1) ............................................................................ 360
16.3.2 Higher Address Set Registers (WRARH0 and WRARH1) ............................................................ 361
16.3.3 Lower Address Set Registers (WRARL0 and WRARL1) .............................................................. 362
16.3.4 Address Comparison EN Register (WREN) ................................................................................. 363
16.3.5 Data Test Set Register (WROR) .................................................................................................. 364
16.4 Explanation of Operations of the Wild Register Functions ................................................................ 365
APPENDIX .......................................................................................................................... 367
APPENDIX A I/O Map ................................................................................................................................. 368
APPENDIX B Overview of the Instructions .................................................................................................. 372
B.1
Addressing ...................................................................................................................................... 375
B.2
Special Instructions ......................................................................................................................... 379
B.3
Bit Manipulation Instructions (SETB and CLRB) ............................................................................. 382
B.4
F2MC-8L Instructions List ............................................................................................................... 383
B.5
Instruction Map ................................................................................................................................ 390
APPENDIX C Mask Options ........................................................................................................................ 391
APPENDIX D Programming Eprom with Piggyback/Evaluation Chip .......................................................... 392
APPENDIX E Pin States of the MB89930A Series ...................................................................................... 393
INDEX ................................................................................................................................. 395