Dual I2S Stereo Audio Codec _______________" />
參數(shù)資料
型號(hào): MAX9880AEWM+T
廠商: Maxim Integrated Products
文件頁數(shù): 42/70頁
文件大?。?/td> 0K
描述: IC CODEC AUDIO STEREO 48WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 立體聲音頻
數(shù)據(jù)接口: I²C,I²S,串行,SPI?
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 82 / 96
電壓 - 電源,模擬: 1.65 V ~ 1.95 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 48-WLP(2.70x3.50)
包裝: 帶卷 (TR)
MAX9880A
Low-Power, High-Performance
Dual I2S Stereo Audio Codec
______________________________________________________________________________________
47
BITS
FUNCTION
Left/Right Microphone Programmable Gain Amplifier
SETTING
GAIN (dB)
SETTING
GAIN (dB)
0x00
+20
0x0B
+9
0x01
+19
0x0C
+8
0x02
+18
0x0D
+7
0x03
+17
0x0E
+6
0x04
+16
0x0F
+5
0x05
+15
0x10
+4
0x06
+14
0x11
+3
0x07
+13
0x12
+2
0x08
+12
0x13
+1
0x09
+11
0x14 to 0x1F
0
PGAML/
PGAMR
0x0A
+10
Table 16. Microphone Input Registers (continued)
ADC
The MAX9880A includes two 18-bit ADCs. The first
ADC is used to record left-channel microphone and
line-input audio signals. The second ADC can be used
to record right-channel microphone and line-input sig-
nals or it can be configured to accurately measure DC
voltages.
When measuring DC voltages both the left and right ADC
must be enabled by setting ADLEN and ADREN in regis-
ter 0x26. The input to the second ADC is JACKSNS/
AUX and the output is reported in AUX (registers 0x02
and 0x03). Since the audio ADC is used to perform the
measurement, the digital audio interface must be prop-
erly configured. If the left ADC is being used to convert
audio, then the DC measurement is performed at the
same sample rate. When not using the left ADC, config-
ure the digital interface for a 48kHz sample rate to
ensure the fastest possible settling time.
To ensure accurate results, the MAX9880A includes
two calibration routines. Calibrate the ADC each time
the MAX9880A is powered on. Calibration settings are
not lost if the MAX9880A is placed in shutdown. When
making a measurement, set AUXCAP to 1 to prevent
AUX from changing while reading the registers.
Setup Procedure
1) Ensure a valid MCLK signal is provided and config-
ure PSCLK appropriately.
2) Choose a clocking mode. The following options are
possible:
a. Slave mode with LRCLK and BCLK signals
provided. The measurement sample rate is
determined by the external clocks.
b. Slave mode with no LRCLK and BCLK signals
provided. Configure the device for normal clock
mode using the NI ratio. Select fS = 48kHz to
allow for the fastest settling times.
c. Master mode with audio. Configure the device
in normal mode using the NI ratio or exact inte-
ger mode using FREQ1 as required by the audio
signal.
d. Master mode without audio. Configure the
device in normal mode using the NI ratio. Select
fS = 48kHz to allow for the fastest settling times.
3) Ensure jack sense is disabled.
4) Enable the left and right ADC; take the MAX9880A
out of shutdown.
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