參數(shù)資料
型號(hào): MAX9879ERV+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 19/32頁(yè)
文件大小: 0K
描述: IC AUDIO SUBSYSTEM 30-UCSP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
系列: DirectDrive®
類型: D 類
輸出類型: 2-通道(立體聲)帶立體聲耳機(jī)
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量: 715mW x 2 @ 8 歐姆; 58mW x 2 @ 16 歐姆
電源電壓: 2.7 V ~ 5.5 V
特點(diǎn): 消除爆音,差分輸入,I²C,靜音,短路和熱保護(hù),關(guān)機(jī),音量控制
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 30-UCSP(5x6)
封裝/外殼: 30-WFBGA,CSPBGA
包裝: 帶卷 (TR)
MAX9879
Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
26
Maxim Integrated
ACKNOWLEDGE FROM MAX9879
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9879
NOT ACKNOWLEDGE FROM MASTER
A
P
A
0
ACKNOWLEDGE FROM MAX9879
R/W
SA
R/W
REPEATED START
Sr
1
SLAVE ADDRESS
REGISTER ADDRESS
SLAVE ADDRESS
DATA BYTE
Figure 11. Reading One Indexed Byte of Data from the MAX9879
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9879
B1 B0
B3 B2
B5 B4
B7 B6
A
0
ACKNOWLEDGE FROM MAX9879
R/W
S
A
1 BYTE
ACKNOWLEDGE FROM MAX9879
B1 B0
B3 B2
B5 B4
B7 B6
P
A
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE 1
DATA BYTE n
Figure 10. Writing n Bytes of Data to the MAX9879
MAX9879. Figure 10 illustrates the frame format for writ-
ing n bytes of data to the MAX9879.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9879.
The MAX9879 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
The second byte transmitted from the master config-
ures the MAX9879’s internal register address pointer.
The pointer tells the MAX9879 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9879 upon receipt of the address pointer data.
The third byte sent to the MAX9879 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX9879 signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This
autoincrement feature allows a master to write to
sequential registers within one continuous frame. Figure
10 illustrates how to write to multiple registers with one
frame. The master signals the end of transmission by
issuing a STOP (P) condition.
Register addresses greater than 0x04 are reserved. Do
not write to these addresses.
A
0
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE
ACKNOWLEDGE FROM MAX9877
R/W
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9877
ACKNOWLEDGE FROM MAX9879
B1
B0
B3
B2
B5
B4
B7
B6
S
A
P
Figure 9. Writing One Byte of Data to the MAX9879
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