參數(shù)資料
型號(hào): MAX9856ETL+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 46/46頁(yè)
文件大小: 0K
描述: IC AUDIO CODEC 40TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 音頻編解碼器
數(shù)據(jù)接口: 串行
分辨率(位): 18 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標(biāo)準(zhǔn) ADC / DAC (db): 77 / 91
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 85 / 91
電壓 - 電源,模擬: 1.71 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.71 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(5x5)
包裝: 帶卷 (TR)
MAX9856
Low-Power Audio CODEC with
DirectDrive Headphone Amplifiers
_______________________________________________________________________________________
9
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SLEEP MODE (JDETEN = 1, SHDNB = 0)
JACKSNS/HPL Resistance
RPU
MICBIAS = GND
400
1000
k
Ω
JACKSNS/HPL Sense Voltage
VPU
VAVDD
V
JACKSNS/HPL Sleep Threshold
(JKSNS/LSNS)
VTH4
VAVDD -
0.8V
VAVDD -
0.4V
VAVDD -
0.15V
V
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MCLK INPUT CHARACTERISTICS
Input Voltage High
VIH
0.7 x VDVDD
V
Input Voltage Low
VIL
0.4
V
Input Leakage Current
IIH, IIL
-10
+10
A
Input Capacitance
3pF
MCLK Input Frequency
10
60
MHz
MCLK Duty Cycle
40
50
60
%
Maximum MCLK Input Jitter
For guaranteed performance limits
100
psRMS
DIGITAL INPUTS (BCLK, LRCLK_A, LRCLK_D, SDIN, SDA, SCL)
Input Voltage High
VIH
0.7 x VDVDD
V
Input Voltage Low
VIL
0.3 x VDVDD
V
Input Hysteresis
200
mV
Input Leakage Current
IIH, IIL
-10
+10
A
Input Capacitance
10
pF
CMOS DIGITAL OUTPUTS (BCLK, LRCLK_A, LRCLK_D, SDOUT)
Output Low Voltage
VOL
IOL = 3mA
0.4
V
Output High Voltage
VOH
IOH = 3mA
VDVDD - 0.4
V
OPEN-DRAIN DIGITAL OUTPUTS (
IRQ, SDA)
Output High Current
IOH
VOUT = VDVDD
1A
Output Low Voltage
VOL
IOL = 3mA
0.4
V
DIGITAL AUDIO INTERFACE TIMING CHARACTERISTICS
tBCLKS
Slave operation
75
ns
BCLK Cycle Time
tBCLKM
Master operation
100
325
ns
BCLK High Time
tBCLKH
Slave operation
30
ns
BCLK Low Time
tBCLKL
Master operation
30
ns
BCLK or LRCLK_A/D Rise and
Fall Time
tr , tf
Master operation, CL = 15pF
7
ns
DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS
(VDVDD = VDVDDS2 = 1.8V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VCPVDD = VDVDDS2 = VDVDD = 1.8V, RHP = 32Ω, RLINE = 10kΩ, C1 = 4.7F, C2 = 4.7F, CREF = CMBIAS = CPREG =
CNREG = 1F, AVPRE = +20dB, CMICBIAS = 1F, AVMICPGA = 0dB, MCLK = 11.2896MHz, DRATE = 00, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
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