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參數(shù)資料
| 型號： | MAX9702ETI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 15/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP AUDIO PWR 1.8W D 28TQFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | DirectDrive® |
| 類型： | D 類 |
| 輸出類型： | 2-通道（立體聲）帶立體聲耳機(jī) |
| 在某負(fù)載時最大輸出功率 x 通道數(shù)量： | 1.8W x 2 @ 4 歐姆; 45mW x 2 @ 32 歐姆 |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 特點： | 消除爆音，差分輸入，I²C，靜音，短路和熱保護(hù)，關(guān)機(jī) |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 28-TQFN-EP（5x5） |
| 封裝/外殼： | 28-WFQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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MAX9702
Early STOP Conditions
The MAX9702 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The MAX9702 is available with one of two preset slave
addresses (see Table 2). The address is defined as the
7 most significant bits (MSBs) followed by the
Read/Write bit. The address is the first byte of informa-
tion sent to the MAX9702 after the START condition.
The MAX9702 is a slave device only capable of being
written to. The Read/Write bit must always be a zero
when configuring the MAX9702. The MAX9702 does
not acknowledge the receipt of its address even if R/W
is set to 1.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9702 uses to handshake receipt each byte of data
(see Figure 11). The MAX9702 pulls down SDA during
the master-generated 9th clock pulse. The SDA line
must remain stable and low during the high period of
the acknowledge clock pulse. Monitoring ACK allows
for detection of unsuccessful data transfers. An unsuc-
cessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master may
reattempt communication.
Write Data Format
A write to the MAX9702 includes transmission of a
START condition, the slave address with the R/W bit set
to zero (see Table 2), 1 byte of data to configure the
command register, and a STOP condition. Figure 12
illustrates the proper format for one frame.
The MAX9702 only accepts write data, but it acknowl-
edges the receipt of its address byte with the R/W bit
set high. The MAX9702 does not write to the SDA bus
in the event that the R/W bit is set high. Subsequently,
the master reads all 1s from the MAX9702. Always set
the R/W bit to zero to avoid this situation.
1.8W, Filterless, Stereo, Class D Audio Power
Amplifier and DirectDrive Stereo Headphone Amplifier
22
______________________________________________________________________________________
Table 2. MAX9702 Address Map
MAX9702 SLAVE ADDRESS
PART
A6
A5
A4
A3
A2
A1
A0
R/
W
MAX9702
1
0
1
0
MAX9702B
1
0
1
0
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
SA
0
ACKNOWLEDGE FROM MAX9702
R/W
ACKNOWLEDGE
FROM MAX9702
B7 B6 B5 B4 B3 B2
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
AP
B1 B0
SLAVE ADDRESS
COMMAND BYTE
Figure 11. Acknowledge
Figure 12. Write Data Format Example
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9702EUI+ | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TSSO - Rail/Tube |
| MAX9702EUI+T | 制造商:Maxim Integrated Products 功能描述:AUD AMP HDPH/SPKR 2CH STEREO 1.8W/0.045W CLS-AB/CLS-D 28TSSO - Tape and Reel |
| MAX9702EVCMODU | 功能描述:放大器 IC 開發(fā)工具 MAX9702/2B Eval Kit RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評估:IR4302 工作電源電壓:13 V to 23 V |
| MAX9702EVKIT | 功能描述:放大器 IC 開發(fā)工具 MAX9702/2B Eval Kit RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評估:IR4302 工作電源電壓:13 V to 23 V |
| MAX9703DEVBRD | 功能描述:放大器 IC 開發(fā)工具 MAX9703 Eval Kit RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評估:IR4302 工作電源電壓:13 V to 23 V |
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