
M
High-Efficiency, Low-I
Q
PMIC with
Dynamic Core for PDAs and Smartphones
20
______________________________________________________________________________________
Voltage Monitors, Reset, and
Undervoltage-Lockout Functions
Undervoltage Lockout
When the input voltage is below 2.35V (typ), an under-
voltage-lockout (UVLO) circuit disables the IC. The
inputs remain high impedance while in UVLO, reducing
battery load under this condition. All serial registers are
maintained with the input voltage down to at least 2.35V.
Reset Output
(RSO)
and
MR
Input
The reset output (
RSO
) is low when the
MR
input is low
or when V7 is below 2.425V. V7 is powered from V1
(when enabled) or the backup-battery input (BKBT).
RSO
normally goes low:
1) When power is first applied in configurations with no
separate backup battery (external diode from IN to
BKBT).
2) When power is removed in configurations with no
separate backup battery (external diode from IN to
BKBT).
3) If the backup battery falls below 2.425V when V1 is
off or out of regulation.
4) When the manual reset button is pressed (
MR
goes
low).
If V
IN
> 2.4V, an internal timer delays the release of
RSO
for 65ms after V7 rises above 2.3V. However, if V
IN
<
2.4V when V7 exceeds 2.3V, or if V
IN
and V7 rise at the
same time,
RSO
deasserts immediately with no 65ms
delay. There is no delay in the second case because the
timer circuitry is deactivated to minimize operating cur-
rent during V
IN
undervoltage lockout.
If it is desired to have a 65ms
RSO
release delay for any
sequence of V
IN
and V7, the circuit in Figure 2 may be
used. An RC connected from IN to
MR
delays the rise of
MR
until after V
IN
powers up. The 65ms timer is valid for
either sequence of V7 and V
IN
and does not release until
65ms after both are up. The only regulator output that
affects
RSO
is V7.
RSO
will not respond to V1–V6, which
are monitored by POK. Also,
RSO
is high impedance
and does not function if BKBT is not powered.
MR
is a manual reset input for hardware reset. A low
input at
MR
causes the
RSO
output to go low for at least
65ms and also resets the V3 output to its default 1.3V set-
ting and turns off the V6 output.
MR
impacts no other
MAX8588 functions.
Dead-Battery and
Low-Battery Comparators—DBI, LBI
The DBI and LBI inputs monitor input power (usually a
battery) and trigger the
DBO
and
LBO
outputs. The
dead-battery comparator triggers
DBO
when the battery
(V
IN
) discharges to the dead-battery threshold. The
factory-set 3.15V threshold is selected by connecting
DBI to IN, or the threshold can be programmed with a
resistor-divider at DBI. The low-battery comparator has
a factory-set 3.6V threshold that is selected by connect-
ing LBI to IN, or its threshold can be programmed with a
resistor-divider at LBI.
One three-resistor-divider can set both DBI and LBI
(R1, R2, and R3 in Figure 3) according to the following
equations:
1) Choose R3 to be less than 250k
2) R1 = R3 V
LB
(1 - (1.232 / V
DB
))
3) R2 = R3 (1.232 x (V
LB
/ V
DB
) - 1)
where V
LB
is the low-battery threshold and V
DB
is the
dead-battery threshold.
MAX8588
MAIN BATTERY
R1
438k
R2
62k
R3
200k
IN
DBI (1.232V THRESHOLD)
LBI (1.00V THRESHOLD)
Figure 3. Setting the Low-Battery and Dead-Battery Thresholds
with One Resistor Chain. The values shown set a DBI threshold
of 3.3V and an LBI threshold of 3.5V (no resistors are needed
for the factory preset thresholds).
IN
MAX8588
MR
100k
0.22
μ
F
Figure 2. An RC delay connected from IN to
MR
ensures that
the 65ms
RSO
release delay remains in effect for any
sequence of IN and V7.