參數(shù)資料
型號: MAX7651
廠商: Maxim Integrated Products, Inc.
英文描述: Flash Programmable 12-Bit Integrated Data-Acquisition Systems
中文描述: 閃存、可編程、12位、集成數(shù)據(jù)采集系統(tǒng)
文件頁數(shù): 22/36頁
文件大小: 479K
代理商: MAX7651
M
Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
22
______________________________________________________________________________________
0.3V and AV
DD
+ 0.3V without damage. For accurate
conversions the inputs should not extend beyond the
supply rails.
Transfer Function
Figure 7 shows the bipolar two
s complement ADC
transfer function. The single-ended conversion range
extends from -V
REF
/2 to +V
REF
/2, where V
REF
= V
REF+
- V
REF-
. The differential conversion range extends from
-V
REF
to +V
REF
. Each LSB in the single-ended and dif-
ferential mode reflects voltage increments of V
REF
/4096
and 2V
REF
/4096, respectively.
ADC Special Function Registers
The ADCON or A/D Control SFR establishes ADC oper-
ating conditions and input configurations. Table 7
shows the individual bit functions. A
write
to ADCON
initiates the A/D conversion process.
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
SMOD0
BIT
7
6,5,4
3
2
1
GF1
GF0
STOP
IDLE
NAME
SMOD0
GF1
GF0
STOP
DESCRIPTION
Serial Port 0 Baud-Rate Doubler Enable. SMOD0 = 1, doubles the baud rate.
Reserved
General Flag 1. General-purpose flag for software control.
General Flag 0. General-purpose flag for software control.
STOP Mode Select. STOP = 1 stops the crystal oscillator and powers down the analog circuitry.
0
IDLE
IDLE Mode Select. IDLE = 1 results in suspension of CPU processing.
Table 7. Power Control (PCON) Format
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
CY
BIT
AC
F0
RS1
RS0
OV
F1
P
NAME
DESCRIPTION
7
CY
Carry Flag. Set to
1
, following an additional operation that results in a carry or a subtraction operation
that results in a borrow. Otherwise cleared to 0.
6
AC
Auxiliary Carry Flag. Similar to CY, but used for BCD operations.
5
F0
User Flag 0. General-purpose flag for software control.
Register Select Bits. These select one of four banks of eight registers that occupy the first 32
addresses in the lower internal RAM.
RS1
0
0
1
1
RS0
0
1
0
1
SELECTED REGISTER BANK
Register bank 0, addresses 00H
07H
Register bank 1, addresses 08H
0FH
Register bank 2, addresses 10H
17H
Register bank 3, addresses 18H
1FH
4,3
RS1,
RS0
2
OV
Over l ow Fl ag S et to
1
, for any ar hm eti c op er ati on that yi el d s an over l ow Other w se cl ear ed to zer o.
1
F1
User Flag 1. General-purpose flag for software control.
0
P
Parity flag. Set to
1
, when the module 2 sum of the accumulator bits is one (odd number of 1
s),
otherwise clear to zero (even number of 1
s).
Table 6. Program Status Word (PSW) Format
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