參數(shù)資料
型號(hào): MAX5895
廠商: Maxim Integrated Products, Inc.
英文描述: 16-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs
中文描述: 16位、500Msps、插值與調(diào)制、雙路DAC,CMOS輸入
文件頁數(shù): 30/32頁
文件大?。?/td> 807K
代理商: MAX5895
M
However, noise sources such as thermal noise, refer-
ence noise, clock jitter, etc. affect the ideal reading.
Therefore, SNR is computed by taking the ratio of the
RMS signal to the RMS noise, which includes all spec-
tral components minus the fundamental, the first four
harmonics, and the DC offset.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of the RMS amplitude of the carrier
frequency (maximum signal components) to the RMS
value of their next largest distortion component. SFDR
is usually measured in dBc and with respect to the car-
rier frequency amplitude or in dBFS with respect to the
DAC’s full-scale range. Depending on its test condition,
SFDR is observed within a predefined window or
to Nyquist.
Two-/Four-Tone Intermodulation
Distortion (IMD)
The two-tone IMD is the ratio expressed in dBc (or
dBFS) of the worst 3rd-order (or higher) IMD products
to either output tone.
Adjacent Channel Leakage
Power Ratio (ACLR)
Commonly used in combination with WCDMA (wide-
band code-division multiple-access), ACLR reflects the
leakage power ratio in dB between the measured pow-
ers within a channel relative to its adjacent channel.
ACLR provides a quantifiable method of determining
out-of-band spectral energy and its influence on an
adjacent channel when a bandwidth-limited RF signal
passes through a nonlinear device.
16-Bit, 500Msps Interpolating and Modulating
Dual DAC with CMOS Inputs
30
______________________________________________________________________________________
Pin Configuration
58
59
60
61
62
54
55
56
57
63
38
39
40
41
42
43
44
45
46
47
A11
A10
A
O
QFN
TOP VIEW
O
G
A
D
G
O
O
G
A
D
G
52
53
A
D
F
A
D
D
A
A
A
A
A
D
S
B
B
B
D
D
B
SCLK
SDI
SDO
DV
DD3.3
B0
B1
B2
B3
B4
B5
35
36
37
DV
DD1.8
B6
B7
A12
A13
A14
A15
D
VDD1.8
A8
A9
DATACLK
D
VDD3.3
N.C.
N.C.
N.C.
CLKN
48
CS
CLKP
64
G
65
66
67
A
D
G
A
D
68
A
C
23
22
21
20
19
27
26
25
24
18
29
28
32
31
30
B
B
34
33
49
50
REFIO
RESET
51
DACREF
11
10
9
8
7
6
5
4
3
2
16
15
14
13
12
1
A7
17
MAX5895
EXPOSED PADDLE
相關(guān)PDF資料
PDF描述
MAX5895EGK 16-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs
MAX5901ACEUT Analog IC
MAX5927 Low-Voltage. Quad. Hot-Swap Controllers/Power Sequencers
MAX5929 Low-Voltage. Quad. Hot-Swap Controllers/Power Sequencers
MAX5930 Low-Voltage. Triple. Hot-Swap Controllers/Power Sequencers/Voltage Trackers
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