參數(shù)資料
型號: MAX5851ETL+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/18頁
文件大?。?/td> 0K
描述: IC DAC 8BIT DUAL 80MSPS 40-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
設(shè)置時間: 12ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(6x6)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 80M
MAX5851
Dual, 8-Bit, 80Msps, Current-Output DAC
______________________________________________________________________________________
11
Detailed Description
The MAX5851 dual, high-speed, 8-bit, current-output
DAC provides superior performance in communication
systems requiring low-distortion analog-signal recon-
struction. The MAX5851 combines two DACs and an on-
chip 1.24V reference (Figure 2). The current outputs of
the DACs can be configured for differential or single-
ended operation. The full-scale output current range is
adjustable from 2mA to 20mA to optimize power dissi-
pation and gain control.
The MAX5851 accepts an input data and a DAC con-
version rate of 80MHz. The inputs are latched on the
rising edge of the clock whereas the output latches on
the following rising edge.
The MAX5851 features three modes of operation: normal,
standby, and power-down (Table 2). These modes allow
efficient power management. In power-down, the
MAX5851 consumes only 1A of supply current. Wake-
up time from standby mode to normal DAC operation
is 3s.
Programming the DAC
An 8-bit control word routed through channel A’s data
port programs the gain matching, reference, and the
operational mode of the MAX5851. The control word is
latched on the rising edge of CW. CW is independent
of the DAC clock. The DAC clock can always remain
running when the control word is written to the DAC.
Table 1 and Table 2 represent the control word format
and function.
The gain on channel A can be adjusted to achieve gain
matching between two channels in a user’s system.
The gain on channel A can be adjusted from -0.4dB to
+0.35dB in steps of 0.05dB by using bits G3 to G0 (see
Table 3).
Pin Description (continued)
PIN
NAME
FUNCTION
32
REFR
Full-Scale Current Adjustment. To set the output full-scale current, connect an external resistor RSET
between REFR and AGND. The output full-scale current is equal to 32 x VREFO/RSET.
33, 39
AVDD
Analog Power Input. See the Power Supplies, Bypassing, Decoupling, and Layout section for more details.
34
OUTNB
Channel B Negative Analog Current Output
35
OUTPB
Channel B Positive Analog Current Output
36, 40
AGND
Analog Ground
37
OUTNA
Channel A Negative Analog Current Output
38
OUTPA
Channel A Positive Analog Current Output
—EP
Exposed Paddle. Connect EP to the common point of all ground planes.
8-BIT
DACA
CHANNEL A
GAIN
CONTROL
DA0/G0
DA1/G1
DA2/G2
DA3/G3
DA4/REN
DA5/IDE
DA6/DACEN
DA7/PD
DACA
INPUT
REGISTER
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DACB
INPUT
REGISTER
CONTROL
WORD
CW
G0
G1
G2
OPERATING
MODE
CONTROLLER
DACEN
PD
G3
INPUT DATA
INTERLEAVER
8-BIT
DACB
CLOCK
DISTRIBUTION
1.24V REFERENCE
AND CONTROL
AMPLIFIER
CLOCK
POWER
MANAGEMENT
DCE
CLKXP
CLKXN
CLK
DIGITAL
POWER
MANAGEMENT
ANALOG
POWER
MANAGEMENT
MAX5851
DVDD
DGND
CVDD
CGND
IDE
REN
REFR
REFO
RSET
AGND
OUTNB
OUTPB
OUTNA
OUTPA
AGND
AVDD
Figure 2. Simplified Diagram
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