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參數(shù)資料
| 型號(hào)： | MAX5851ETL+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT DUAL 80MSPS 40-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 12ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | 80M |
MAX5851
Dual, 8-Bit, 80Msps, Current-Output DAC
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = CVDD = 3V, AGND = DGND = CGND = 0, fDAC = 80Msps, differential clock, external reference, VREF = 1.2V, IFS =
20mA, differential output, output amplitude = 0dBFS, TA = TMIN to TMAX, unless otherwise noted. TA ≥ +25°C, guaranteed by produc-
tion test. TA < +25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DACEN = 1 to VOUT Stable Time
(Coming Out of Standby)
tSTB
3s
PD = 0 to VOUT Stable Time
(Coming Out of Power-Down)
tSHDN
500
s
Maximum Clock Frequency at
CLKXP/CLKXN Input
fCLK
80
MHz
Clock High Time
tCXH
CLKXP or CLKXN input
3
ns
Clock Low Time
tCXL
CLKXP or CLKXN input
3
ns
CLKXP Rise to CLK Output
Rise Delay
tCDH
DCE = 0
2.7
ns
CLKXP Fall to CLK Output
Fall Delay
tCDL
DCE = 0
2.7
ns
Note 1: Including the internal reference voltage tolerance and reference amplifier offset.
Note 2: fDAC = 80Msps, fOUT = 10MHz.
Note 3: Measured single ended with 50 load and complementary output connected to ground.
Note 4: Guaranteed by design, not production tested.
TO OUTPUT
PIN
5pF
0.5mA
1.6V
Figure 1. Load Test Circuit for CLK Outputs
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