I2C = VDD) In standard SPI" />
參數(shù)資料
型號: MAX5550ETE+T
廠商: Maxim Integrated Products
文件頁數(shù): 4/15頁
文件大小: 0K
描述: IC DAC 10BIT DUAL 30MA 16-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時間: 30µs
位數(shù): 10
數(shù)據(jù)接口: I²C,串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-TQFN(3x3)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 10M
MAX5550
Applications Information
Daisy Chaining (SPI/
I2C = VDD)
In standard SPI-/QSPI-/MICROWIRE-compatible
systems, a microcontroller (C) communicates with its
slave devices through a 3- or 4-wire serial interface.
The typical interface includes a chip-select signal (CS),
a serial clock (SCLK), a data input signal (DIN), and
sometimes a data signal output (DOUT). In this system,
the C allots an independent slave-select signal (SS_)
to each slave device so that they can be addressed
individually. Only the slaves with their CS inputs assert-
ed low acknowledge and respond to the activity on the
serial clock and data lines. This is simple to implement
when there are very few slave devices in the system.
An alternative method is daisy chaining. Daisy
chaining, in serial-interface applications, is the method
of propagating commands through devices connected
in series (see Figure 8).
Daisy chain devices by connecting the DOUT of one
device to the DIN of the next. Connect the SCLK of all
devices to a common clock and connect the CS of all
devices to a common slave-select line. Data shifts out of
DOUT 16.5 clock cycles after it is shifted into DIN on the
falling edge of SCLK. In this configuration, the C only
needs three signals (SS, SCK, and MOSI) to control all of
the slaves in the network. The SPI-/QSPI-/MICROWIRE-
compatible serial interface normally works at up to
10MHz, but must be slowed to 5MHz if daisy chaining.
DOUT is high impedance when CS is high.
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
12
______________________________________________________________________________________
1
2
3
4
5
6
7
8
9
10111213141516
D7
D6
D5
D4
D3
D2
D1
D0
C3
C2
SCLK
DIN
CS
C5
C4
C1
C0
D9
D8
Figure 7. SPI-Interface Format
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
tCSW
tCS1
tCSD
tCSH
LSB
tDO1
tCL
tCP
tCH
tDH
tDS
MSB
tCSS
tCSO
CS
SCLK
DIN
DOUT
tCSE
Figure 6. SPI-Interface Timing Diagram
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