
MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
8
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Pin Description
PIN
NAME
FUNCTION
1
SCLK/SC
Serial Clock Input. Connect SCL to VDD through a 2.4k
resistor in I2C mode.
2
DIN/SDA
Serial Data Input. Connect SDA to VDD through a 2.4k
resistor in I2C mode.
3
CS/A0
Chip-Select Input in SPI Mode/Address Select 0 in I2C Mode.
CS is an active-low input. Connect A0 to VDD
or GND to set the device address in I2C mode.
4
SPI/
I2C
SPI/
I2C Select Input. Connect SPI/I2C to VDD to select SPI mode, or connect SPI/I2C to GND to select I2C
mode.
5
DOUT/A1
Serial Data Output in SPI Mode/Address Select 1 in I2C Mode. Use DOUT to daisy chain the MAX5550 to
other devices or to read back in SPI mode. The digital data is clocked out on SCLK’s falling edge. Connect
A1 to VDD or GND to set the device address in I2C mode.
6, 13, 15
N.C.
No Connection. Leave unconnected or connect to GND.
7
REFIN
Reference Input. Drive REFIN with an external reference source between +0.5V and +1.5V. Leave REFIN
unconnected in internal reference mode. Bypass with a 0.1F capacitor to GND as close to the device as possible.
8, 16
GND
Ground
9
OUTB
DACB Output. OUTB provides up to 30mA of output current.
10
FSADJB
DACB Full-Scale Adjust Input. For maximum full-scale output current, connect a 20k
resistor between FSADJB
and GND. For minimum full-scale current, connect a 40k
resistor between FSADJB and GND.
11
FSADJA
DACA Full-Scale Adjust Input. For maximum full-scale output current, connect a 20k
resistor between FSADJA
and GND. For minimum full-scale current, connect a 40k
resistor between FSADJA and GND.
12
OUTA
DACA Output. OUTA provides up to 30mA of output current.
14
VDD
Power Supply Input. Connect VDD to a +2.7 to +5.25V power supply. Bypass VDD to GND with a 0.1F
capacitor as close to the device as possible.
—
EP
Exposed Pad. Connect to GND. Do not use as a substitute ground connection.
Detailed Description
Architecture
The MAX5550 10-bit, dual current-steering DAC (see
the Functional Diagram) operates with DAC update
rates up to 10Msps in SPI mode and 400ksps in I2C
mode. The converter consists of a 16-bit shift register
and input DAC registers, followed by a current-steering
array. The current-steering array generates full-scale
currents up to 30mA per DAC. An integrated +1.25V
bandgap reference, control amplifier, and an external
resistor determine each data converter’s full-scale out-
put range.
Reference Architecture and Operation
The MAX5550 provides an internal +1.25V bandgap ref-
erence or accepts an external reference voltage source
between +0.5V and +1.5V. REFIN serves as the input for
an external low-impedance reference source. Leave
REFIN unconnected in internal reference mode. Internal
or external reference mode is software selectable
through the SPI/I2C serial interface.
The MAX5550’s reference circuit (Figure 1) employs a
control amplifier to regulate the full-scale current (IFS) for
the current outputs of the DAC. This device has a soft-
ware-selectable full-scale current range (see the com-
mand summary in Table 4). After selecting a current
range, an external resistor (RFSADJ_) sets the full-scale
current. See Table 1 for a matrix of IFS and RFSADJ
selections.
During startup, when the power is first applied, the
MAX5550 defaults to the external reference mode, and
to the 1mA–2mA full-scale current-range mode.
DAC Data
The 10-bit DAC data is decoded as offset binary, MSB
first, with 1 LSB = IFS / 1024, and converted into the cor-
responding current as shown in Table 2.
Serial Interface
The MAX5550 features a pin-selectable SPI/I2C serial
interface. Connect SPI/I2C to GND to select I2C mode, or
connect SPI/I2C to VDD to select SPI mode. SDA and
SCL (I2C mode) and DIN, SCLK, and CS (SPI mode)
facilitate communication between the MAX5550 and the
master. The serial interface remains active in shutdown.