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參數(shù)資料
| 型號(hào)： | MAX3676EHJ+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 3/15頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLOCK RECOVERY 32-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類(lèi)型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
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MAX3676
622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
______________________________________________________________________________________
11
Reduced Power Consumption
Without the Limiting Amplifier
The limiting amplifier is biased independently from the
clock recovery circuitry. Grounding INSEL turns off the
limiting amplifier and selects the PECL DDI inputs.
Converting Average Optical Power
to Signal Amplitude
Many of the MAX3676’s specifications relate to input-
signal amplitude. When working with fiber optic
receivers, the input is usually expressed in terms of
average optical power and extinction ratio. The rela-
tions given in Table 2 and Figure 6 are helpful for con-
verting optical power to input signal when designing
with the MAX3676.
In an optical receiver, the input voltage to the limiting
amplifier can be found by multiplying the relationship in
Table 2 by the photodiode responsivity and transim-
pedance amplifier gain.
Optical Hysteresis
Power and hysteresis are often expressed in decibels.
By definition, decibels are always 10log (power). At the
inputs to the MAX3676 limiting amplifier, the power is
VIN2/R. If a receiver’s optical input power (x) increases
by a factor of two, and the preamplifier is linear, then the
voltage at the input to the MAX3676 also increases by a
factor of two.
The optical power increase is:
10log(2x/x) = 10log(2) = +3dB
At the MAX3676, the voltage increase is:
In an optical receiver, the decibel change at the
MAX3676 always equals 2x the optical decibel change.
The MAX3676’s typical voltage hysteresis is 3.0dB. This
provides an optical hysteresis of 1.5dB.
Jitter in Optical Receivers
Timing jitter, edge speeds, aberrations, optical disper-
sion, and attenuation all impact the performance of
high-speed clock recovery for SDH/SONET receivers
(Figure 7). These effects decrease the time available
for error-free data recovery by reducing the received
“eye opening” of nonreturn-to-zero (NRZ) transmitted
signals.
10
2
20
2
log
log(
)
log(
2V
/ R
V/ R
=
IN
()
=
))
=+6dB
TIME
P0
P1
PAVE
Figure 6. Optical Power Relations
Table 2. Optical-Power Relations*
*Assuming a 50% average input-data duty cycle.
SYMBOL
RELATION
Average
Power
PAVG
Extinction
Ratio
re
PARAMETER
Optical Power
of a “1”
P1
Optical Power
of a “0”
P0
Signal
Amplitude
PIN
P
= P0 + P1 / 2
AVG
()
r =
1 / P0
e
P
PP
r
AVG
e
12
1
=
+
P0
2P
/ r
1
AVG
e
=+
()
PP
P
r
IN
AVG
e
=
()
+
10
2
1
AMPLITUDE
EYE DIAGRAM WITH NO TIMING JITTER
EFFECTS OF TIMING JITTER ON EYE DIAGRAM
TIME
MIDPOINT
TIME
MIDPOINT
Figure 7. Eye Diagram With and Without Timing Jitter
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3677CTJ+ | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Trays 制造商:Microsemi Corporation 功能描述:Microsemi MAX3677CTJ+ Clocks - Timers 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CLOCK GENERATOR PROGR 32TQFN 制造商:Microsemi Corporation 功能描述:IC CLOCK GENERATOR PROGR 32TQFN |
| MAX3677CTJ+T | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Tape and Reel |
| MAX3677EVKIT+ | 制造商:Microsemi Corporation 功能描述:MAX3677 EVALUATION KIT - Boxed Product (Development Kits) 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:KIT EVALUATION MAX MAX3677 |
| MAX3678EVKIT+ | 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 Not Available From Mouser RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| MAX3678UTN+ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Low-Jitter Frequency Synthesizer RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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