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參數(shù)資料
| 型號(hào)： | MAX3676EHJ+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 15/15頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK RECOVERY 32-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
MAX3676
622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
_______________________________________________________________________________________
9
The comparator is configured with an active-high LOP
output. An on-chip, 6k
Ω pull-up resistor is provided to
reduce the external part count.
Setting the Loop Filter
The MAX3676 is designed for both regenerator and
receiver applications. Its fully integrated PLL is a classic
second-order feedback system, with a loop bandwidth
(fL) fixed at 250kHz. The external capacitor, CF, can be
adjusted to set the loop damping. Figures 2 and 3 show
the open-loop and closed-loop transfer functions. The
PLL zero frequency, fZ, is a function of external capaci-
tor CF, and can be approximated according to:
For an overdamped system (fZ/fL) <0.25, the jitter peak-
ing (MP) of a second-order system can be approximat-
ed by:
For example, using CF = 0.22μF results in a jitter peak-
ing of 0.27dB. Reducing CF below 0.22μF may result in
PLL instability. The recommended value for CF is 2.2μF
to guarantee a maximum jitter peaking of less than
0.1dB.
The MAX3676 is optimally designed to acquire lock and
to provide a bit-error rate (BER) of less than 10-10 for
long strings of consecutive zeros and ones. Measured
results show that the MAX3676 can tolerate 1200 con-
secutive ones or zeros. Decreasing CF reduces the
number of tolerated consecutive identical zeros and
ones. CF must be a low-TC, high-quality capacitor of
type X7R or better.
Lock Detect
The MAX3676’s LOL monitor indicates when the PLL is
locked. Under normal operation, the loop is locked and
the LOL output signal is high. When the MAX3676 loses
lock, a fast negative-edge transition occurs on LOL.
The output level remains at a low level (held by CLOL)
until the loop reacquires lock (Figure 4).
M
=
0log 1+
P
2
f
Z
L
f
=
1
2
Z
π()
90 CF
100
1k
10k
100k
CF = 0.22
μF
fZ = 8.04kHz
CF = 2.2
μF
fZ = 804Hz
1M
10M
f (Hz)
OPEN-LOOP
GAIN
100
1k
10k
100k
CF = 0.22
μF
CF = 2.2
μF
0
-3
H(J2
πf) (dB)
1M
10M
f (kHz)
CLOSED-LOOP
GAIN
Figure 2. Open-Loop Transfer Function
Figure 3. Closed-Loop Transfer Function
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3677CTJ+ | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Trays 制造商:Microsemi Corporation 功能描述:Microsemi MAX3677CTJ+ Clocks - Timers 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CLOCK GENERATOR PROGR 32TQFN 制造商:Microsemi Corporation 功能描述:IC CLOCK GENERATOR PROGR 32TQFN |
| MAX3677CTJ+T | 制造商:Microsemi Corporation 功能描述:+3.3V, LOW-JITTER CLOCK GEN W/MULT OUT - Tape and Reel |
| MAX3677EVKIT+ | 制造商:Microsemi Corporation 功能描述:MAX3677 EVALUATION KIT - Boxed Product (Development Kits) 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:KIT EVALUATION MAX MAX3677 |
| MAX3678EVKIT+ | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Not Available From Mouser RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| MAX3678UTN+ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Low-Jitter Frequency Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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