- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384665 > MAX3672 (Maxim Integrated Products, Inc.) Low-Jitter 155MHz/622MHz Clock Generator PDF資料下載
參數(shù)資料
| 型號： | MAX3672 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Jitter 155MHz/622MHz Clock Generator |
| 中文描述： | 低抖動、155MHz/622MHz時鐘發(fā)生器 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 493K |
| 代理商： | MAX3672 |
M
Low-Jitter 155MHz/622MHz Clock Generator
6
_______________________________________________________________________________________
Pad Description
PAD
NAME
FUNCTION
1
C2+
Positive Filter Input. External capacitor connected between C2+ and C2- used for setting the higher
order pole frequency (see the
Setting the Higher-Order Poles
section).
2
C2-
Negative Filter Input. External capacitor connected between C2+ and C2- used for setting the higher
order pole frequency (see the
Setting the Higher-Order Poles
section).
3, 10, 16
4
VCCD
THADJ
Positive Digital Supply Voltage
Threshold Adjust Input.
Used to adjust the loss-of-lock threshold (see the
LOL
Setup
section).
5, 12, 18, 27,
33
GND
Ground
6
CTH
Threshold Capacitor Input.
Connect capacitor connected between CTH and ground to control the
loss-of-lock conditions (see the
LOL
Setup
section).
7
8
9
NSEL1
NSEL2
GSEL
Divide Selector 1 Input.
Three-level pin used to set the frequency divider ratio (N
2
) (Table 3).
Divide Selector 2 Input.
Three-level pin used to set the frequency divider ratio (N
2
) (Table 3).
Gain Selector Input.
Three-level pin used to set the phase-detector gain (Kpd) (Table 4).
11
LOL
Loss of Lock.
LOL
signals a TTL low when the reference frequency differs from the VCO frequency.
LOL
signals a TTL high when the reference frequency equals the VCO frequency.
13
RSEL
Reference Clock Selector Input.
Three-level pin used to set the pre-divider ratio (N
3
) for the input
reference clock (Table 1).
14
15
REFCLK+
REFCLK-
Positive Reference Clock Input, PECL
Negative Reference Clock Input, PECL
17
VSEL
VCO Clock Selector Input.
Three-level pin used to set the pre-divider ratio (N
1
) for the input VCO
clock (Table 2).
19
20
POUT-
POUT+
VCCO
MOUT-
MOUT+
VCOIN-
VCOIN+
Negative Optional Clock Output, PECL
Positive Optional Clock Output, PECL
Positive Supply Voltage for PECL Outputs
Negative Main Clock Output, PECL
Positive Main Clock Output, PECL
Negative VCO Clock Input, PECL
Positive VCO Clock Input, PECL
21, 24
22
23
25
26
28
VFILTER
Optional Noise Filter. Connect an external capacitor to reduce PECL output noise (see the
Typical
Application Circuit
).
29
VC
Control Voltage Output. The voltage output from the op amp that controls the VCO.
30
POLAR
Polarity Control of Op Amp Input. POLAR = GND for VCOs with positive-gain transfer. POLAR = V
CC
for VCOs with negative-gain transfer.
31
32
34
PSEL1
PSEL2
VCCA
Optional Clock Selector 1 Input. Sets the divider ratio for the optional clock output (Table 5).
Optional Clock Selector 2 Input.
Sets the divider ratio for the optional clock output (Table 5).
Positive Analog Supply Voltage for the Charge Pump and Op Amp
35
COMP
Compensation Control Input.
Op Amp Compensation Reference Control Input. COMP = GND for
VCOs whose control pin is V
CC
referenced. COMP = V
CC
for VCOs whose control pin is GND
referenced.
36
37
OPAMP-
OPAMP+
Negative Op Amp Input, POLAR = GND
Positive Op Amp Input, POLAR = GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX3675EHJ | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3675 | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3675ECJ | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3676EHJ | 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3676 | 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3672E/D | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3672E/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3673DBETN+ | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MAX3673ETN | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MAX3673ETN+ | 功能描述:時鐘合成器/抖動清除器 Low-Jitter Frequency Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。