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參數(shù)資料
| 型號： | MAX3270EMH |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 32-Bit Digital Signal Controller with Flash 100-BGA MICROSTAR -40 to 125 |
| 中文描述： | CLOCK RECOVERY CIRCUIT, PQFP44 |
| 封裝： | MQFP-44 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 101K |
| 代理商： | MAX3270EMH |
_______________Detailed Desc ription
The block diagram of Figure 1 shows the MAX3270’s
architecture. The phase-locked loop (PLL) consists of a
phase/frequency detector (PFD), a loop filter amplifier,
and a voltage-controlled oscillator (VCO).
Phase Detec tor
The phase detector produces a voltage proportional to
the phase difference of the incoming data and the out-
put of the recovered clock. Because of its feedback
nature, the PLL will drive the error voltage to zero, mak-
ing the phase difference zero and aligning the recov-
ered clock to the incoming data. An external
phase-adjustment pin (PHADJ ) allows the user to vary
phase alignment.
Frequenc y Detec tor
A frequency detector is also incorporated into the PLL.
Frequency detection aids in the acquisition of the input
data; this frequency-aided acquisition is necessary dur-
ing start-up conditions, since the input data stream and
VCO difference frequency may be outside the PLL
bandwidth. The input data stream is sampled by quad-
rature components of the VCO clock, generating a dif-
ference frequency. Depending on the rotation of the
difference frequency, the PFD will drive the VCO so that
the difference frequency is driven to zero. Once fre-
quency acquisition is obtained, the frequency detector
will return to a neutral state.
Loop Filter and V CO
The PLL is a second-order transfer function whose
bandwidth is set by the loop filter. The VCO is integrat-
ed into the PLL and always operates at 622MHz. The
center frequency is tightly controlled by laser trimming,
limiting frequency drift when lock is lost. 155Mbps or
622Mbps mode is selected by the clock-rate select
(CRS) pin. CRS selects the inputs to multiplexer MUX2.
The internal VCO can be bypassed with an external
clock applied to the EXC input. The external clock
select (EXCS) controls the input selections to multiplex-
ers MUX1 and MUX2.
M
155Mbps/622Mbps Cloc k Rec overy and
Data Retiming IC with Fully Integrated
Phase/Frequenc y Detec tor
_______________________________________________________________________________________
7
PHASE/FREQ
DETECTOR
VCO
622.08MHz
DIVIDE-
BY-4
CLK
OUTPUT
INPUT
MUX 3
MUX 2
MUX 1
SDIP
SDIN
FILTER
AMP
RST
PHADJ
VR
FILP
Q
FILN
D
RDOP
RDON
CRP
38/155MHz
RCOP
RCON
EXCS
EXC
RST
CRS
0
1
0
1
1
0
155MHz
622MHz
100k
ECL
100k
ECL
100k
ECL
MAX3270
FM
CLK
RECOVERED
DATA
RECOVERED
CLOCK
Figure 1. Block Diagram
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| MAX3270EMH-T | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX3271E/D | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX3271E/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3271EVKIT | 功能描述:交換機 IC 開發(fā)工具 RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:USB Power Switches 工具用于評估:MAX4984E 工作電源電壓:2.8 V to 5.5 V |
| MAX3272AEGP | 功能描述:限幅放大器 3.3V 2.5Gbps Limiting Amplifier RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
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