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參數(shù)資料
| 型號： | MAX189CEWE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 16/18頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SERIAL LP 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 75k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 478mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
MAX187/MAX189
+5V, Low-Power, 12-Bit Serial ADCs
7
Maxim Integrated
Detailed Description#
Converter Operation
The MAX187/MAX189 use input track/hold (T/H) and suc-
cessive approximation register (SAR) circuitry to convert
an analog input signal to a digital 12-bit output. No exter-
nal hold capacitor is needed for the T/H. Figures 3a and
3b show the MAX187/MAX189 in their simplest configu-
ration. The MAX187/MAX189 convert input signals in the
0V to VREF range in 10s, including T/H acquisition time.
The MAX187’s internal reference is trimmed to 4.096V,
while the MAX189 requires an external reference. Both
devices accept external reference voltages from +2.5V to
VDD. The serial interface requires only three digital lines,
SCLK, CS, and DOUT, and provides easy interface to
microprocessors (Ps).
Both converters have two modes: normal and shutdown.
Pulling SHDN low shuts the device down and reduces
supply current to below 10A, while pulling SHDN high or
leaving it floating puts the device into the operational mode.
A conversion is initiated by CS falling. The conversion result
is available at DOUT in unipolar serial format. A high bit,
signaling the end of conversion (EOC), followed by the data
bits (MSB first), make up the serial data stream.
The MAX187 operates in one of two states: (1) internal
reference and (2) external reference. Select internal
reference operation by forcing SHDN high, and external
reference operation by floating SHDN.
Analog Input
Figure 4 illustrates the sampling architecture of the
ADC’s analog comparator. The full-scale input voltage
depends on the voltage at REF.
REFERENCE
ZERO SCALE
FuLL SCALE
Internal Reference
(MAX187 only)
0V
+4.096V
External Reference
0V
VREF
For specified accuracy, the external reference voltage
range spans from +2.5V to VDD.
Figure 1. Load Circuits for DOUT Enable Time
Figure 2. Load Circuits for DOUT Disable Time
DOUT
3kI
CLOAD = 100pF
3kI
DGND
+5V
B. HIGH-Z TO VOL AND VOH TO VOL
A. HIGH-Z TO VOH AND VOL TO VOH
DGND
DOUT
3kI
CLOAD = 100pF
3kI
DGND
+5V
B. VOL TO HIGH-Z
A. VOH TO HIGH-Z
DGND
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