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參數(shù)資料
| 型號： | MAX1455EVKIT-NS |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL KIT FOR MAX1455 |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 主要目的： | 接口，傳感器信號調(diào)節(jié)器 |
| 已用 IC / 零件： | MAX1455 |
| 已供物品： | 板 |
MAX1455
Low-Cost Automotive Sensor Signal
Conditioner
14
______________________________________________________________________________________
Figure 4 shows an example transmit/receive sequence
with the RDIRS command (59hex) being sent and the
MAX1455 responding with a byte value of 10hex.
Internal Clock Settings
Following initial power-up, or after a power reset, all of
the calibration registers within the MAX1455 contain
0000hex and must be programmed. Note that in analog
mode, the internal registers are automatically refreshed
from the EEPROM.
When starting the MAX1455 in digital mode, pay spe-
cial attention to the 3 CLK bits: 3MSBs of the
Configuration register. The frequency of the MAX1455
internal oscillator is measured during production testing
and a 3-bit adjustment (calibration) code is calculated
IRS COMMAND (8 BITS)
IRSA [3:0]
IRSD [3:0]
0000
DHR [3:0]
0001
DHR [7:4]
0010
DHR [11:8]
0011
DHR [15:12]
0100
RESERVED
0101
RESERVED
0110
ICRA [3:0]
IEEA [3:0]
IEEA [7:4]
0111
IRSP [3:0]
IEEA [9:8]
1000
CRIL [3.0]
(EXECUTE)
1001
ATIM [3:0]
1010
1011
ALOC [3:0]
1100 TO
1110
RESERVED
RELEARN
BAUD RATE
1111
ICRA [3:0] CALIBRATION REGISTER
0000
CONFIG
0001
ODAC
0010
OTCDAC
0011
FSODAC
0100
FSOTCDAC
0101 TO
1111
RESERVED
CRIL [3:0]
FUNCTION
0000
LOAD ICR
0001
WRITE EEPROM
0010
ERASE EEPROM
0011
READ ICR
0100
READ EEPROM
0101
0110
0111
1000 TO
1111
READ IRS
ANALOG OUT
ERASE PAGE
RESERVED
IRSP [3:0]
RETURNS
0000
DHR [7:0]
0001
DHR [F:8]
0010
IEEA [7:4], ICRA [3:0]
0011
CRIL [3:0], IRSP [3:0]
0100
ALOC [3:0], ATIM [3.0]
0101
0110
0111
1000
IEEA [7:0]
IEED [7:0]
TEMP-INDEX [7:0]
1001
1010 TO
1111
BITCLK [7:0]
RESERVED
11001010 - (USE TO
CHECK COMMUNICATION)
BIDIRECTIONAL
16-BIT
DATA
LATCH
EEPROM
MEMORY
768 X 8 BITS
ADDR
DATA
LOOKUP
ADDRESS
TEMP INDEX [7:0]
OUTPUT
TIMER
OUTPUT
MUX
OUT
PGA
TABLE 9. INTERFACE REGISTER
SET COMMANDS
TABLE 16. INTERNAL CALIBRATION
REGISTERS
ENABLE ANALOG OUTPUT
DHR [7:0]
DHR [15:8]
TABLE 10. CRIL ACTIONS
TABLE 11. IRS POINTER FUNCTIONS (READS)
DIO
Figure 5. MAX1455 Serial Command Structure and Hardware Schematic
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