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參數(shù)資料
| 型號： | MAX1455EVKIT-NS |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL KIT FOR MAX1455 |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 主要目的： | 接口，傳感器信號調(diào)節(jié)器 |
| 已用 IC / 零件： | MAX1455 |
| 已供物品： | 板 |
MAX1455
The MAX1455 allows complete calibration and sensor
verification to be performed at a single test station. Once
calibration coefficients have been stored in the ASIC, the
customer can choose to retest in order to verify perfor-
mance as part of a regular QA audit or to generate final
test data on individual sensors. In addition, Maxim has
developed a pilot production test system to reduce time
to market. Engineering test evaluation and pilot produc-
tion of the MAX1455 can be performed without expending
the cost and time to develop in-house test capabilities.
Contact Maxim for additional information.
Frequency response can be user adjusted to values
lower than the 3.2kHz bandwidth by using the uncom-
mitted op amp and simple passive components.
The MAX1455 (Figure 1) provides an analog amplifica-
tion path for the sensor signal. It uses a digitally con-
trolled analog path for nonlinear temperature correction.
For PRT applications, analog architecture is available for
first-order temperature correction. Calibration and cor-
rection are achieved by varying the offset and gain of a
PGA and by varying the sensor bridge excitation current
or voltage. The PGA utilizes a switched capacitor CMOS
technology, with an input-referred offset trimming range
of more than ±150mV with an approximate 3V resolution
(16 bits). The PGA provides gain values from 39V/V to
234V/V in 16 steps.
The MAX1455 uses four 16-bit DACs with calibration
coefficients stored by the user in an internal 768 x 8
EEPROM (6144 bits). This memory contains the follow-
ing information, as 16-bit-wide words:
Configuration register
Offset calibration coefficient table
Offset temperature coefficient register
FSO calibration coefficient table
FSO temperature correction register
52 bytes (416 bits) uncommitted for customer pro-
gramming of manufacturing data (e.g., serial num-
ber and date)
Offset Correction
Initial offset correction is accomplished at the input
stage of the signal gain amplifiers by a coarse offset
setting. Final offset correction occurs through the use of
a temperature-indexed lookup table with one hundred
seventy-six 16-bit entries. The on-chip temperature sen-
sor provides a unique 16-bit offset trim value from the
table with an indexing resolution of approximately 1.5°C
from -40°C to +125°C. Every millisecond, the on-chip
temperature sensor provides indexing into the offset
lookup table in EEPROM and the resulting value is
transferred to the offset DAC register. The resulting volt-
age is fed into a summing junction at the PGA output,
compensating the sensor offset with a resolution of
±76V (±0.0019% FSO). If the offset TC DAC is set to
zero, then the maximum temperature error is equivalent
to 1°C of temperature drift of the sensor, given that the
Offset DAC has corrected the sensor every 1.5°C. The
temperature indexing boundaries are outside the speci-
fied absolute maximum ratings. The minimum indexing
value is 00hex, corresponding to approximately -69°C.
All temperatures below this value output the coefficient
value at index 00hex. The maximum indexing value is
AFhex, which is the highest lookup table entry. All tem-
peratures higher than approximately +184°C output the
highest lookup table index value. No indexing wrap-
around errors are produced.
FSO Correction
Two functional blocks control the FSO gain calibration.
First, a coarse gain is set by digitally selecting the gain of
the PGA. Second, FSODAC sets the sensor bridge cur-
rent or voltage with the digital input obtained from a tem-
perature indexed reference to the FSO lookup table in
EEPROM. FSO correction occurs through the use of a
Low-Cost Automotive Sensor Signal
Conditioner
6
_______________________________________________________________________________________
Figure 1. Functional Diagram
MAX1455
BIAS
GENERATOR
OSCILLATOR
ANAMUX
AMP-
AMPOUT
OUT
TEST 1
BDR
PGA
INP
INM
8-BIT A/D
TEMP
SENSOR
IRO
DAC
CURRENT
SOURCE
∑
CLIP-TOP
CLIP-BOT
TEST 2
TEST 3
TEST 4
AMP+
CONTROL
VDD1
VDD2
DIO
UNLOCK
VSS
176-POINT
TEMPERATURE-
INDEXED
FSO
COEFFICIENTS
176-POINT
TEMPERATURE-
INDEXED
OFFSET
COEFFICIENTS
416 BITS FOR
USER DATA
CONFIG REG
6144-BIT
EEPROM
16-BIT
DAC
-
FSO
16-BIT
DAC
-
OFFSET
16-BIT
DAC
-
OFFSET
TC
16-BIT
DAC
-
FSO
TC
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