參數(shù)資料
型號: MAX1441GUP/V+
廠商: Maxim Integrated Products
文件頁數(shù): 5/41頁
文件大小: 0K
描述: IC PROXMITY SENSOR 2CH 20-TSSOP
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 74
類型: 觸控式傳感器
輸入類型: 數(shù)字
輸出類型: 數(shù)字
接口: JTAG,串行
電流 - 電源: 100µA
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
MAX1441
Automotive, Two-Channel Proximity and
Touch Sensor
13
Table 4. Special-Purpose Registers’ Reset Values
Table 5. Special-Purpose Register Bit Description
REGISTER
MSB
LSB
AP
0000
APC
0000
PSF
1000
0000
IC
0000
IMR
0000
SC
1000
00s0
IIR
0000
CKCN
1110
0000
WDCN
ss11
0ss0
A0
0000
A1
0000
A2
0000
A3
0000
REGISTER
MSB
LSB
PFX
0000
IP
1000
0000
SP
0000
0010
1111
IV
0000
0111
1111
1101
LC0
0000
LC1
0000
DPC
0000
0100
GR
0000
GRL
0000
GRS
0000
GRH
0000
GRXL
0000
DP0
0000
REGISTER
DESCRIPTION
AP (00h, 08h)
Accumulator Pointer (8-Bit Register)
Initialization
This register is cleared to 00h on all forms of reset.
Read/Write Access
Unrestricted read/write.
AP[1:0]
Active Accumulator Select Bits [1:0]. The setting of these bits activates one of the four accumulators
in the accumulator module (A) to function as the active accumulator for arithmetic and logical opera-
tions. The setting of these bits can be automatically incremented/decremented in a modulo fashion
according to the setting to the APC register.
AP[7:2]
Reserved. Read returns 0.
APC (01h, 08h)
Accumulator Pointer Control (8-Bit Register)
Initialization
This register is cleared to 00h on all forms of reset.
Read/Write Access
Unrestricted read/write.
APC[1:0]–MOD[1:0]
Modulo Bits [1:0]. The accumulator pointer autoincrement/decrement function is activated when these
bits are set to a value other than 00b. The modulo is selected accordingly when active pointer autoincre-
ment/decrement is active.
MOD[1:0]
MODULO
00
Default, no AP autoincrement/decrement
01
Modulo 2
10
Modulo 4
11
Reserved (modulo 4 if set)
APC[5:2]
Reserved. Read returns 0.
APC.6–IDS
Increment/Decrement Select. When this bit is cleared to 0, the content of AP increments after an arith-
metic or logical operation. When this bit is set to 1, the content of AP is decremented after arithmetic or
logical operation.
APC.7–CLR
AP Clear. When this bit is set to 1, the content of AP is cleared to 0. This bit automatically resets to 0
after clearing the AP register. Note if the MOVE APC, Acc instruction (980Ah) causes the CLR bit to set,
the clear operation overrides other functions (i.e., the AP autoincrement/decrement does not happen).
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