- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384647 > MAX106CHC (MAXIM INTEGRATED PRODUCTS INC) 【5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier PDF資料下載
參數(shù)資料
| 型號： | MAX106CHC |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 【5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PBGA192 |
| 封裝： | 25 X 25 MM, ESBGA-192 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大?。?/td> | 758K |
| 代理商： | MAX106CHC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
M
±5V, 600Msps, 8-Bit ADC with On-Chip
2.2GHz Bandwidth Track/Hold Amplifier
______________________________________________________________________________________
23
asserted, the auxiliary port contained “even” samples
while the primary port contained “odd” samples. After
RSTOUT is deasserted (which marks the start of the
DREADY clock’s reset phase), note that the order of the
samples in the ports has been reversed. The auxiliary
port also contains an out-of-sequence sample. This is a
consequence of the “swallowed” clock cycle that was
needed to resynchronize DREADY to the reset phase.
Also note that the older sample data is always in the aux-
iliary port, regardless of the DREADY phase.
These examples show the combinations that result with
a reset input signal of two clock cycles. It is also possi-
ble to successfully reset the internal MAX106 demux
with a reset pulse only one clock cycle long, proving
the setup-time and hold-time requirements are met with
respect to the sample clock. However, this is not rec-
ommended when additional external demuxes are
used.
Note that many external demuxes require their reset
signals to be asserted while they are clocked, and may
require more than one clock cycle of reset. More impor-
tantly, if the phase of the DREADY clock is such that a
clock pulse will be “swallowed” to resynchronize, then
no reset output will occur at all. In effect, the RSTOUT
signal will be “swallowed” along with the clock pulse.
The best method to ensure complete system reset is to
assert RSTIN for the appropriate number of DREADY
clock cycles required to complete reset of the external
demuxes.
Die Temperature Measurement
For applications that require monitoring of the die tem-
perature, it is possible to determine the die temperature
of the MAX106 under normal operating conditions by
observing the currents I
CONST
and I
PTAT
, at contacts
ICONST and IPTAT. I
CONST
and I
PTAT
are two 100μA
(nominal) currents that are designed to be equal at
+27°C. These currents are derived from the MAX106’s
internal precision +2.5V bandgap reference. I
CONST
is
designed to be temperature independent, while I
PTAT
is
directly proportional to the absolute temperature. These
currents are derived from pnp current sources refer-
enced from V
CC
I and driven into two series diodes con-
nected to GNDI. The contacts ICONST and IPTAT may
be left open because internal catch diodes prevent sat-
uration of the current sources. The simplest method of
NOTE:
DREADY PHASE WAS ADJUSTED TO MATCH THE RESET PHASE BY “SWALLOWING” ONE INPUT CLOCK CYCLE.
THE AUXILIARY PORT CONTAINS AN OUT-OF-SEQUENCE SAMPLE AS A RESULT OF THE DELAY.
CLK-
CLK+
t
SU
t
HD
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
n+8
n+9
n+10
n+11
n+12
n+13
ADC SAMPLE NUMBER
ADC SAMPLES ON THE RISING EDGE OF CLK+
CLOCK PULSE “SWALLOWED”
OUT-OF-SEQUENCE SAMPLE
CLK
DREADY
DREADY+
DREADY-
RSTIN+
RSTIN-
RSTOUT+
RSTOUT-
RESET
INPUT
n-1
n+1
n-2
AUXILIARY
DATA PORT
PRIMARY
DATA PORT
n
n+2
n+4
RESET OUT
DATA PORT
Figure 19. Reset Output Timing in Demuxed DIV2 Mode (DREADY Realigned)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX106 | 【5V, 600Msps, 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier |
| MAX1071CTC-T | 1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs |
| MAX1070CTC-T | 1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs |
| MAX1070 | 1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs |
| MAX1070ETC-T | 1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX106CHC-D | 制造商:Maxim Integrated Products 功能描述:ADC SGL FLASH 600MSPS 8BIT PARALLEL 192PIN ESBGA - Rail/Tube |
| MAX106CHC-TD | 制造商:Maxim Integrated Products 功能描述:ADC SGL FLASH 600MSPS 8BIT PARALLEL 192PIN ESBGA - Tape and Reel |
| MAX106EVKIT | 制造商:Maxim Integrated Products 功能描述:KIT PKG - Bulk |
| MAX107 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual, 6-Bit, 400Msps ADC with On-Chip, Wideband Input Amplifier |
| MAX1070 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。