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參數(shù)資料
| 型號： | MAX104CHC |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 【5V, 1Gsps, 8-Bit ADC with On-Chip 2.2GHz Track/Hold Amplifier |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PBGA192 |
| 封裝： | 25 X 25 MM, ESBGA-192 |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 637K |
| 代理商： | MAX104CHC |
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M
±5V, 1Gsps, 8-Bit ADC with
On-Chip 2.2GHz Trac k/Hold Amplifier
______________________________________________________________________________________
11
Pin Desc ription (c ontinued)
Differential Input Voltage (-)
VIN-
J 1
Auxiliary Output Data Bit 3
A3+
J 18
Primary Output Data Bit 4
P4+
L18
Complementary Primary Output Data Bit 4
P4-
L17
Complementary Auxiliary Output Data Bit 3
A3-
J 17
Auxiliary Output Data Bit 4
A4+
M18
Primary Output Data Bit 5
P5+
N18
Complementary Primary Output Data Bit 5
P5-
N17
CONTACT
Complementary Auxiliary Output Data Bit 5
A5-
P17
FUNCTION
NAME
This contact
must
be connected to GNDI.
TESTPOINT (T.P.)
P2
Complementary Sampling-Clock Input
CLK-
P1
Complementary Auxiliary Output Data Bit 4
A4-
M17
Auxiliary Output Data Bit 5
A5+
P18
50
Clock Termination Return
CLKCOM
R1, R2, R3
Sampling Clock Input
CLK+
T1
Complementary PECL Reset Output
RSTOUT-
U11
Complementary PECL Demux Reset Input
RSTIN-
U10
Tie to V
CC
O to power the auxiliary port. Tie to GNDD to power
down.
AUXEN1
R19
Complementary PECL Overrange Bit
OR-
U12
Complementary Primary Output Data Bit 7 (MSB)
P7-
U14
Complementary Primary Output Data Bit 6
P6-
U16
Complementary Auxiliary Output Data Bit 6
A6-
U15
Complementary Auxiliary Output Data Bit 7 (MSB)
A7-
U13
PECL Reset Output
RSTOUT+
V11
PECL Demux Reset Input
RSTIN+
V10
PECL Overrange Bit
OR+
V12
Primary Output Data Bit 7 (MSB)
P7+
V14
Primary Output Data Bit 6
P6+
V16
Auxiliary Output Data Bit 6
A6+
V15
Auxiliary Output Data Bit 7 (MSB)
A7+
V13
Complementary Data-Ready Clock
DREADY-
K17
Differential Input Voltage (+)
VIN+
L1
Data-Ready Clock
DREADY+
K18
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