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參數(shù)資料
| 型號： | MAX1035EUP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 18/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT SER 115KSPS 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 115k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 879mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個差分，單極；2 個差分，雙極 |
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MAX1034/MAX1035
8-/4-Channel, ±VREF Multirange Inputs,
Serial 14-Bit ADCs
______________________________________________________________________________________
25
Internal-Clock-Mode Control Byte
Reset Byte
Partial Power-Down-Mode-Control Byte
This prevents the MAX1034/MAX1035 from inadvertent-
ly exiting full power-down mode because of a CS glitch
in a noisy digital environment.
Power-On Reset
The MAX1034/MAX1035 power up in normal operation
configured for external clock mode with all circuitry
active (Tables 7 and 8). Each analog input channel
(CH0–CH7) is set for single-ended conversions with a
±VREF bipolar input range (Table 6).
Allow the power supplies to stabilize after power-up. Do
not initiate any conversions until the power supplies
have stabilized. Additionally, allow 10ms for the internal
reference to stabilize when CREF = 1.0F and CREFCAP
= 0.1F. Larger reference capacitors require longer
stabilization times.
Internal or External Reference
The MAX1034/MAX1035 operate with either an internal or
external reference. The reference voltage impacts the
ADC’s FSR (Figures 12, 13, and 14). An external refer-
ence is recommended if more accuracy is required than
the internal reference provides, and/or multiple converters
require the same reference voltage.
Internal Reference
The MAX1034/MAX1035 contain an internal 4.096V
bandgap reference. This bandgap reference is connect-
ed to REFCAP through a nominal 5k
resistor (Figure 17).
The voltage at REFCAP is buffered creating 4.096V at
REF. When using the internal reference, bypass
REFCAP with a 0.1F or greater capacitor to AGND1 and
bypass REF with a 1.0F or greater capacitor to AGND1.
External Reference
For external reference operation, disable the internal
reference and reference buffer by connecting REFCAP
to AVDD1. With AVDD1 connected to REFCAP, REF
becomes a high-impedance input and accepts an
external reference voltage. The MAX1034/MAX1035
external reference current varies depending on the
applied reference voltage and the operating mode (see
the External Reference Input Current vs. External
Reference Input Voltage in the
Typical Operating
Characteristics).
Applications Information
Noise Reduction
Additional samples can be taken and averaged (over-
sampling) to remove the effect of transition noise on
conversion results. The square root of the number of
samples determines the improvement in performance.
For example, with 2/3 LSBRMS (4 LSBP-P) transition
noise, 16 (42 = 16) samples must be taken to reduce
the noise to 1 LSBP-P.
Interface with 4–20mA Signals
Figure 19 illustrates a simple interface between the
MAX1034/MAX1035 and a 4–20mA signal. 4–20mA sig-
naling can be used as a binary switch (4mA represents
a logic-low signal, 20mA represents a logic-high sig-
nal), or for precision communication where currents
between 4mA and 20mA represent intermediate analog
data. For binary switch applications, connect the
4–20mA signal to the MAX1034/MAX1035 with a resis-
tor to ground. For example, a 200
resistor converts
the 4–20mA signal to a 0.8V to 4V signal. Adjust the
resistor value so the parallel combination of the resistor
and the MAX1034/MAX1035 source impedance is
200
. In this application, select the single-ended 0 to
VREF range (R[2:0] = 011, Table 6). For applications
that require precision measurements of continuous
analog currents between 4mA and 20mA, use a buffer
to prevent the MAX1034/MAX1035 input from diverting
current from the 4–20mA signal.
REF
REFCAP
AGND1
4.096V
BANDGAP
REFERENCE
5k
1x
SAR
ADC REF
4.096V
1.0
F
0.1
F
VRCTH
MAX1034
MAX1035
Figure 17. Internal Reference Operation
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