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參數(shù)資料
| 型號： | M39832-T12WNE1T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | TRANSZORB, 600W, VR: 25.6V UNIPOLAR, VBR: 28.5V - 31.5V |
| 中文描述： | 單芯片8兆1兆x8或512KB的x16閃存和256千位并行EEPROM存儲器 |
| 文件頁數(shù)： | 21/36頁 |
| 文件大小： | 253K |
| 代理商： | M39832-T12WNE1T |
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Erase Suspend (ES) Instruction.
The Block
Erase operation may be suspended by this instruc-
tion which consists of writing the command B0h
without any specific address. No Coded cycles are
required. It permits reading of data from another
block and programming in another block while an
erase operation is in progress. Erase suspend is
accepted only during the Block Erase instruction
execution. Writing this command during Erase
timeout will, in addition to suspending the erase,
terminate the timeout. The Toggle bit DQ6 stops
toggling when erase is suspended. The Toggle bits
will stop toggling between 0.1ms and 15ms after
the Erase Suspend (ES) command has been writ-
ten. The device will then automatically be set to
Read Memory Array mode. When erase is sus-
pended, a Read from blocks being erased will
output DQ2 toggling and DQ6 at ’1’. A Read from
a block not being erased returns valid data. During
suspension the memory will respond only to the
Erase Resume ER and the Program PG instruc-
tions.
A Program operation can be initiated during erase
suspend in one of the blocks not being erased. It
will result in both DQ2 and DQ6 toggling when the
data is being programmed. A Read/Reset com-
mand will definitively abort erasure and result in
invalid data in the blocks being erased.
Erase Resume (ER) Instruction.
If an Erase Sus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
Coded cycles.
FLASH ARRAY SPECIFIC FEATURES
Block Protection (See Figure 8).
Each block can
be separately protected against Program or Erase
on programming equipment. Block protection pro-
vides additional data security, as it disables all
program or erase operations. This mode is acti-
vated when both A9 and G are raised to V
ID
and an
address in the block is applied on A12-A18. Block
protection is initiated on the edge of W falling to V
IL
.
Then after a delay of 100ms, the edge of W rising
to V
IH
ends the protection operations. Block protec-
tion verify is achieved by bringing G, EF, A0 and A6
to V
IL
and A1 to V
IH
, while W is at V
IH
and A9 at V
ID
.
AI00939
VCC / 2
VCC
0V
Figure 10. AC Testing Input Output Waveform
AI00854
VCC
CL = 30pF
CL includes JIG capacitance
VOUT = 1.5V when the DEVICE
UNDER TEST is in the
Hi-Z output state.
1N914
DEVICE
UNDER
TEST
1N914
IOH
IOL
Figure 11. Output AC Testing Load Circuit
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only, not 100% tested.
Table 11. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
Input Rise and Fall Times
≤
10ns
Input Pulse Voltages
0.V to V
CC
Input and Output Timing Ref.
Voltages
V
CC
/ 2
Table 10. AC Measurement Conditions
21/36
M39832
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M39832-T15WNE1T | Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-B12WNE1T | TVS UNI-DIR 30V 600W DO-15 |
| M39832-B15WNE1T | TVS BI-DIR 30V 600W DO-15 |
| M39832-T12WNE6T | TVS UNI-DIR 33V 600W DO-15 |
| M39832-T15WNE6T | TVS BI-DIR 33V 600W DO-15 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M39832-T12WNE6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-T15WNE1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M39832-T15WNE6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory |
| M3986 SL001 | 制造商:Alpha Wire Company 功能描述:CBL 10PR 24AWG SLT 1000' |
| M3986 SL002 | 制造商:Alpha Wire Company 功能描述:CBL 10PR 24AWG SLT 500' |
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