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參數(shù)資料
| 型號： | M38073M4A00FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 56/74頁 |
| 文件大小： | 1182K |
| 代理商： | M38073M4A00FP |
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56
MITSUBISHI MICROCOMPUTERS
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
NOTES ON USAGE
Handling of Source Pins
In order to avoid a latch-up occurrence, connect a capacitor suitable
for high frequencies as bypass capacitor between power source pin
(V
CC
pin
)
and GND pin (Vss pin) and between power source pin (V
CC
pin
)
and analog power source input pin (AV
SS
pin). Besides, connect
the capacitor to as close as possible. For bypass capacitor which
should not be located too far from the pins to be connected, a ce-
ramic capacitor of 0.01
μ
F—0.1
μ
F is recommended.
P3
4
clock output function
In the case of using an I/O port P3
4
as a clock output function, note
the following : when an output clock frequency is changed during
outputting a clock, the port may feed a noise having a shorter pulse
width than the standard at the switch timing. Besides, it also may
happen at the timing for switching the low-speed mode to the middle/
high-speed mode.
Timer X and timer Y
In the pulse period measurement mode or the pulse width measure-
ment mode for timers X and Y, set the "L" or "H" pulse width of input
signal from CNTR
0
/CNTR
1
pin to 2 cycles or more of a timer count
source.
EPROM version/One Time PROM version
The CNV
SS
pin is connected to the internal memory circuit block by a
low-ohmic resistance, since it has the multiplexed function to be a
programmable power source pin (V
PP
pin) as well.
To improve the noise reduction, connect a track between CNV
SS
pin
and V
SS
pin or V
CC
pin with 1 to 10 k
resistance.
The mask ROM version track of port CNV
SS
has no operational inter-
ference even if it is connected via a resistor.
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