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| 型號： | M38073M4A00FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 17/74頁 |
| 文件大小： | 1182K |
| 代理商： | M38073M4A00FP |
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17
MITSUBISHI MICROCOMPUTERS
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table. 6. Interrupt vector addresses and priority
Note1 :
Vector addresses contain interrupt jump destination addresses.
2 :
Reset function in the same way as an interrupt with the highest priority.
Vector Addresses (Note 1)
Interrupt Request
Interrupt Source Priority
Remarks
High
FFFD
16
FFFB
16
Low
FFFC
16
FFFA
16
Generating Conditions
Reset (Note 2)
INT
0
1
2
At reset
At detection of either rising or falling edge of
INT
0
input
At detection of either rising or falling edge of
INT
1
input
At completion of serial I/O1 data receive
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O1 is selected
INT
1
3
FFF9
16
FFF8
16
Serial I/O1
receive
Serial I/O1
transmit
Timer X
Timer Y
INT
3
4
FFF7
16
FFF6
16
5
FFF5
16
FFF4
16
At completion of serial I/O1 data transmit
shift or when transmit buffer is empty
At timer X underflow
At timer Y underflow
At detection of either rising or falling edge of
INT
3
input
Valid when serial I/O1 is selected
6
7
8
FFF3
16
FFF1
16
FFEF
16
FFF2
16
FFF0
16
FFEE
16
External interrupt
(active edge selectable)
Valid when INT
3
interrupt is selected
Valid when timer 2 interrupt is selected
External interrupt
(active edge selectable)
Valid when INT
4
interrupt is selected
Valid when timer 3 interrupt is selected
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O2 is selected
Timer 2
INT
4
At timer 2 underflow
At detection of either rising or falling edge of
INT
4
input
9
FFED
16
FFEC
16
Timer 3
CNTR
0
At timer 3 underflow
At detection of either rising or falling edge of
CNTR
0
input
At detection of either rising or falling edge of
CNTR
1
input
At completion of serial I/O2 data transmit
and receive
At detection of either rising or falling edge of
INT
2
input
10
FFEB
16
FFEA
16
CNTR
1
11
FFE9
16
FFE8
16
Serial I/O2
12
FFE7
16
FFE6
16
INT
2
13
FFE5
16
FFE4
16
External interrupt
(active edge selectable)
Valid when INT
2
interrupt is selected
Valid when timer 1 interrupt is selected
Timer 1
Timer A
Timer B
A-D conversion
ADT
At timer 1 underflow
At timer A underflow
At timer B underflow
At completion of A-D conversion
At falling edge of ADT input
14
15
16
FFE3
16
FFE1
16
FFDF
16
FFE2
16
FFE0
16
FFDE
16
Valid when A-D interrupt is selected
External interrupt(valid at falling)
Valid when ADT interrupt is selected and
when A-D external trigger is selected.
Non-maskable software interrupt
BRK instruction
17
FFDD
16
FFDC
16
At BRK instruction execution
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