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| 型號： | M38073M4A00FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 50/74頁 |
| 文件大?。?/td> | 1182K |
| 代理商： | M38073M4A00FP |
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50
MITSUBISHI MICROCOMPUTERS
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
("0") before executing the STP instruction. Oscillator restarts when
an external interrupt is received, but the internal clock
φ
is not sup-
plied to the CPU (remains at "H") until timer 2 underflows. This al-
lows time for the clock circuit oscillation to stabilize. The internal clock
φ
is supplied for the first time, when timer 2 underflows. Therefore
make sure not to set the timer 2/INT
3
interrupt request bit to "1" be-
fore the STP instruction stops the oscillator. When the
oscillator is restarted by reset apply "L" level to port RESET until the
oscillation is stable since a wait time will not be generated.
(2) Wait mode
If the WIT instruction is executed, the internal clock
φ
stops at an "H"
level. The states of X
IN
and X
CIN
are the same as the state before
executing the WIT instruction. The internal clock restarts at reset or
when an interrupt is received. Since the oscillator does not stop, nor-
mal operation can be started immediately after the clock is restarted.
Clock Generating Circuit
The 3807 group has two built-in oscillation circuits. An oscillation
circuit can be formed by connecting a resonator between X
IN
and
X
OUT
(X
CIN
and X
COUT
). Use the circuit constants in accordance with
the resonator manufacturer's recommended values. No
external resistor is needed between X
IN
and X
OUT
since a feed-back
resistor exists on-chip. However, an external feed-back resistor is
needed between X
CIN
and X
COUT
.
Immediately after poweron, only the X
IN
oscillation circuit starts
oscillating, and X
CIN
and X
COUT
pins function as I/O ports.
G
Frequency control
(1) Middle-speed mode
The internal clock
φ
is the frequency of X
IN
divided by 8. After reset,
this mode is selected.
(2) High-speed mode
The internal clock
φ
is half the frequency of X
IN
.
(3) Low-speed mode
The internal clock
φ
is half the frequency of X
CIN
.
I
Note
If you switch the mode between middle/high-speed and low-speed,
stabilize both X
IN
and X
CIN
oscillations. The sufficient time is required
for the sub clock to stabilize, especially immediately after poweron
and at returning from stop mode. When switching the mode between
middle/high-speed and low-speed, set the frequency on condition
that f(X
IN
) > 3f(X
CIN
).
(4) Low power consumption mode
The low power consumption operation can be realized by stopping
the main clock X
IN
in low-speed mode. To stop the main clock, set bit
5 of the CPU mode register to "1." When the main clock X
IN
is re-
started (by setting the main clock stop bit to "0"), set enough time for
oscillation to stabilize.
By clearing furthermore the X
COUT
drivability selection bit (b3) of CPU
mode register to "0", low power consumption operation of less than
55
μ
A (V
CC
=3 V, X
CIN
=32 kHz) can be realized by reducing the
drivability between X
CIN
and X
COUT
. At reset or during STP instruc-
tion execution this bit is set to "1" and a reduced drivability that has
an easy oscillation start is set. The sub-clock X
CIN
-X
COUT
oscillating
circuit can not directly input clocks that are generated externally. Ac-
cordingly, make sure to cause an external resonator to oscillate.
G
Oscillation control
(1) Stop mode
If the STP instruction is executed, the internal clock
φ
stops at an "H"
level, and X
IN
and X
CIN
oscillators stop. Timer 1 is set to "FF
16
" and
timer 2 is set to "01
16
."
Either X
IN
or X
CIN
divided by 16 is input to timer 1 as count source,
and the output of timer 1 is connected to timer 2. The bits of the timer
123 mode register except timer 3 count source selection bit (b4) are
cleared to "0". Set the timer 2/INT
3
interrupt source bit to "1" and
timer 1/INT
2
as well as timer 2/INT
3
interrupt enable bit to disabled
X
CIN
X
COUT
X
IN
X
OUT
C
IN
C
OUT
C
CIN
C
COUT
Rf
Rd
X
IN
X
OUT
External oscillation circuit
C
COUT
V
CC
V
SS
open
C
CIN
Rf
Rd
X
CIN
X
COUT
Fig. 56. External clock input circuit
Fig. 55. Ceramic resonator circuit
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