參數(shù)資料
型號： M37920FCCHP
廠商： Mitsubishi Electric Corporation
英文描述： Single Chip 16 Bits CMOS Microcomputer(16位單片機)
中文描述： 單片微機16位的CMOS（16位單片機）
文件頁數(shù)： 124/158頁
文件大?。?/td> 1261K
代理商： M37920FCCHP
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
124
Fig. 121 CPU reprogramming mode set/termination flowchart
Software Commands
Table 26 lists the software commands.
By writing a software command after the CPU reprogramming select
bit has been set to “1”, erasing, programming, etc. can be specified.
Note that, at software commands’ input, the high-order byte (D
8
–
D
15
) is ignored. (Except for the write data at the 2nd cycle of a page
programming command.)
Software commands are explained as below.
Read Array Command (FF
16
)
By writing command code “FF
16
” at the 1st bus cycle, the microcom-
puter enters the read array mode. If an address to be read is input in
the next or the following bus cycles, the contents at the specified ad-
dress are output to the data bus (D
0
to D
15
) in a unit of 16 bits.
The read array mode is maintained until writing of another software
command.
Read Status Register Command (70
16
)
Writing command code “70
16
” at the 1st bus cycle outputs the con-
tents of the status register to the data bus (D
0
-D
7
) by a read at the
2nd bus cycle.
The status register is explained later.
Clear Status Register Command (50
16
)
This command clears three status bits (SR.3–5) each of which is set
to “1” to indicate that the operation has been terminated by an error.
To clear these bits, write command code “50
16
” at the 1st bus cycle.
Page Programming Command (41
16
)
Page programming facilitates quick programming of 128 words (a
page = 256 bytes) at a time. To initiate page programming, write
command code “41
16
” at the 1st bus cycle; then, program a series of
data, in a unit of 16 bits, sequentially from the 2nd to the 129th bus
cycle. It is necessary, at this time, to increment address A
0
–A
7
from
“00
16
” to “FE
16
” by +2. (Programmed to even addresses.)
Upon completion of data loading, automatic programming (data pro-
gramming and verification) operation is started.
The completion of the automatic programming operation is recog-
nized by a read of the status register or a read of the flash memory
control register. As the automatic programming operation starts, the
microcomputer enters the read status register mode automatically to
allow reading out the contents of the status register. Bit 7 of the sta-
tus register (SR.7) is cleared to “0” simultaneously with the start of
the automatic programming operation; and also, bit 7 returns to “1”
by the end of it. Until writing of the read array command (FF
16
), writ-
ing of the read lock bit status command (71
16
), or performing the re-
set operation with the flash memory reset bit, this read status register
mode is maintained. In continuous programming, if there is no pro-
gramming error, page programming commands can be executed
with the read status register mode kept.
Completed
Start
Read array command is executed, or reset is
performed by setting the flash memory reset bit.
(Writing of
“
1
”
→
Writing of
“
0
”
)
(Note 2)
Single-chip mode,
Memory expansion mode,
or Boot mode
The processor mode register is set
(Note 1)
.
Flag I is set to
“
1
”
.
Operations such as erasing, programming are
executed by using software commands.
(If necessary, the lock bit invalidity select bit is set.)
Jump to the above software in the internal RAM.
(The operations shown below will be executed by
the above software in this RAM.)
The user-original reprogramming control software
for the CPU reprogramming mode is transferred to
the internal RAM.
(Only in the boot mode.)
Writing of
“
0
”
to user ROM area select bit
(Note 3)
.
Writing of
“
0
”
to the CPU reprogramming mode
select bit.
(Only in the boot mode.)
The user ROM area select bit is set to
“
1
”
.
Writing of
“
1
”
to the CPU reprogramming mode select bit.
(Writing of
“
0
”
→
Writing of
“
1
”
)
Notes 1:
The processor mode register 1
’
s bit 7 (address 5F
16
, the
internal ROM access wait bit) must be
“
0
”
(1 wait).
2:
To terminate the CPU reprogramming mode after the
erase and programming operations have been
completed, be sure to execute the read array command
or perform the flash memory reset operation.
3:
This bit may remain
“
1
”
. However, if this bit is
“
1
”
, the
user ROM area access is specified.
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相關代理商/技術參數(shù)
參數(shù)描述
M37920FGCGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
M37920FGCHP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
M37920S4CGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16 BIT CMOS MICROCOMPUTER
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