參數(shù)資料
型號(hào)： M3773S4B
廠商： Mitsubishi Electric Corporation
英文描述： Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī))
中文描述： 單片微機(jī)16位的CMOS（16位單片機(jī)）
文件頁(yè)數(shù)： 7/36頁(yè)
文件大?。?/td> 919K
代理商： M3773S4B
7
MITSUBISHI MICROCOMPUTERS
M37733S4BFP
16-BIT CMOS MICROCOMPUTER
New product
Pulse output port mode
The pulse motor drive waveform can be output by using plural internal
timer A.
Figure 3 shows a block diagram for pulse output port mode. In the
pulse output port mode, two pairs of four-bit pulse output ports are
used. Whether using pulse output port or not can be selected by
waveform output selection bit (bit 0, bit 1) of waveform output mode
register (62
16
address) shown in Figure 4. When bit 0 of waveform
output selection bit is set to “1”, RTP1
0
, RTP1
1
, RTP1
2
, and RTP1
3
are used as pulse output ports, and when bit 1 of waveform output
selection bit is set to “1”, RTP0
0
, RTP0
1
, RTP0
2
, and RTP0
3
are
used as pulse output ports. When bits 1 and 0 of waveform output
selection bit are set to “1”, RTP1
0
, RTP1
1
, RTP1
2
, and RTP1
3
, and
RTP0
0
, RTP0
1
, RTP0
2,
and RTP0
3
are used as pulse output ports.
The ports not used as pulse output ports can be used as normal
parallel ports, timer input/output or key input interruput input.
In the pulse output port mode, set timers A0 and A2 to timer mode as
timers A0 and A2 are used. Figure 5 shows the bit configuration of
timer A0, A2 mode registers in pulse output port mode.
Data can be set in each bit of the pulse output data register
corresponding to four ports selected as pulse output ports. Figure 6
shows the bit configuration of the pulse output data register. The
contents of the pulse output data register 1 (low-order four bits of
1C
16
address) corresponding to RTP1
0
, RTP1
1
, RTP1
2
, and RTP1
3
is output to the ports each time the counter of timer A2 becomes
0000
16
. The contents of the pulse output data register 0 (low-order
four bits of 1D
16
address) corresponding to RTP0
0
, RTP0
1
, RTP0
2
,
and RTP0
3
is output to the ports each time the counter of timer A0
becomes 0000
16
.
Figure 7 shows example of waveforms in pulse output port mode.
When “0” is written to a specified bit of the pulse output data register,
“L” level is output to the corresponding pulse output port when the
counter of corresponding timer becomes 0000
16
, and when “1” is
written, “H” level is output to the pulse output port.
Pulse width modulation can be applied to each pulse output port.
Since pulse width modulation involves the use of timers A1 and A3,
activate these timers in pulse width modulation mode.
Fig. 3 Block diagram for pulse output port mode
Timer A2
Pulse width modulation output
by timer A3
Pulse width modulation output
by timer A1
D
3
D
2
D
1
D
0
D
D
D
D
Q
Q
Q
Q
T
D
11
D
10
D
9
D
8
D
D
D
D
Q
Q
Q
Q
T
Timer A0
Pulse output data
register 0 (1D
16
address)
Pulse output data
register 1 (1C
16
address)
Pulse width modulation selection bit
(Bit 4, 5 of 62
16
address)
RTP1
3
(P5
7
)
RTP1
2
(P5
6
)
RTP1
1
(
P5
5
)
RTP1
0
(P5
4
)
RTP0
3
(P5
3
)
RTP0
2
(P5
2
)
RTP0
1
(P5
1
)
RTP0
0
(P5
0
)
Polarity selection bit
(Bit 3 of 62
16
address)
4
5
D
D
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