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參數(shù)資料
| 型號： | M37548G3FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20 |
| 文件頁數(shù)： | 38/84頁 |
| 文件大?。?/td> | 1427K |
| 代理商： | M37548G3FP |
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Rev.2.02
Mar 31, 2009
Page 43 of 81
REJ03B0210-0202
7548 Group
Fig 56. Block diagram of watchdog timer
Notes
(1) The watchdog timer operates in wait mode. To prevent
underflow, write to the watchdog timer control register.
The watchdog timer stops in stop mode, but starts counting
at the same time as exiting stop mode. After exiting stop
mode, it continues counting during oscillation stabilization
time. To prevent underflow during the period, the watchdog
timer H count source selection bit (bit 7) in the watchdog
timer control register (address 003916) should be set to “0”
before executing the STP instruction.
Note that the watchdog timer continues counting even if the
STP instruction is executed in the following two conditions:
1 Stopping the low-speed on-chip oscillator: Disabled (bit
4 in FSROM2)
Source clock of the watchdog timer: Low-speed on-chip
oscillator/16 (bit 0 in FSROM2)
2 Stopping the low-speed on-chip oscillator: Disabled (bit
4 in FSROM2)
Source clock of the watchdog timer:
φSOURCE (bit 0 in
FSROM2)
φSOURCE: Low-speed on-chip oscillator (bits 5 and 4 in
CLKM)
(2) STP instruction function selection bit
The function of the STP instruction can be selected by the bit
2 in FSROM2. This bit cannot be used for rewriting by
executing the STP instruction.
When this bit is set to “0”, stop mode is entered by
executing the STP instruction.
When this bit is set to “1”, internal reset occurs by
executing the STP instruction.
Watchdog timer H (8)
Data bus
Watchdog timer L (8)
“FF16” is set at
WDTCON writing
1/16
φSOURCE
Low-speed on-chip
oscillator
Watchdog timer source
clock selection bit
(bit 0 of FSROM2)
Watchdog timer disable bit
(bit 1 of FSROM2)
Reset
circuit
Internal reset
STP instruction function
selection bit
(bit 3 of FSROM2)
STP Instruction
Reset pin input
Watchdog timer H
count source selection bit
(bit 7 of WDTCON)
Watchdog timer H count source
initial value selection bit
(bit 2 of FSROM2)
FSROM2: Function set ROM data 2
WDTCON: Watchdog timer control register
CPUM: CPU mode register
“FF16” is set at
WDTCON writing
Initial value setting
after releasing reset
“0”
“1”
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| M37640E8-XXXFP | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP80 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37548G3FP#U0 | 功能描述:MCU 6K ROM 256K 20-SSOP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:LPC11Uxx 核心處理器:ARM? Cortex?-M0 芯體尺寸:32-位 速度:50MHz 連通性:I²C，Microwire，SPI，SSI，SSP，UART/USART，USB 外圍設備:欠壓檢測/復位，POR，WDT 輸入/輸出數(shù):40 程序存儲器容量:96KB（96K x 8） 程序存儲器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 包裝:托盤 其它名稱:568-9587 |
| M37548G3-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37549G1FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37549G1-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37549G2FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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