40
7510 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
SWITCHING CHARACTERISTICS 1 (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85
°C, unless otherwise noted)
Symbol
twH(SCLK1)
twH(SCLK2)
twL(SCLK1)
twL(SCLK2)
td(SCLK1–TXD1)
td(SCLK2–TXD2)
tv(SCLK1–TXD1)
tv(SCLK2–TXD2)
tr(SCLK1)
tf(SCLK1)
tr(SCLK2)
tf(SCLK2)
tr(CMOS)
tf(CMOS)
Parameter
Serial I/O1 clock output “H” pulse width
Serial I/O2 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O1 output delay time (Note 1)
Serial I/O2 output delay time (Note 1)
Serial I/O1 output valid time (Note 1)
Serial I/O2 output valid time (Note 1)
Serial I/O1 clock output rise time
Serial I/O1 clock output fall time
Serial I/O2 clock output rise time
Serial I/O2 clock output fall time
CMOS output rise time (Note 2)
CMOS output fall time (Note 2)
Test conditions
CL = 100 pF
Limits
Min.
tc(SCLK1)/2–30
tc(SCLK2)/2–30
tc(SCLK1)/2–30
tc(SCLK2)/2–30
–30
Typ.
10
Max.
140
30
Unit
ns
Notes 1: When bit 4 of the UART control register (address 001B16 or 003316) is “0”.
2: XOUT pin is excluded.
Fig. 34 Circuit for measuring output switching characteristics (1)
Fig. 35 Circuit for measuring output switching characteristics (2)
Note: When bit 4 of the UART contronl register (address 001B16 or 003316)
is “1” (N-channel open-drain output), and bit 7 of the serial I/O con-
trol register (address 001A16 or 003216) is “1”.
SWITCHING CHARACTERISTICS 2 (VCC = 3.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85
°C, unless otherwise noted)
Symbol
twH(SCLK1)
twH(SCLK2)
twL(SCLK1)
twL(SCLK2)
td(SCLK1–TXD1)
td(SCLK2–TXD2)
tv(SCLK1–TXD1)
tv(SCLK2–TXD2)
tr(SCLK1)
tf(SCLK1)
tr(SCLK2)
tf(SCLK2)
tr(CMOS)
tf(CMOS)
Parameter
Serial I/O1 clock output “H” pulse width
Serial I/O2 clock output “H” pulse width
Serial I/O1 clock output “L” pulse width
Serial I/O2 clock output “L” pulse width
Serial I/O1 output delay time (Note 1)
Serial I/O2 output delay time (Note 1)
Serial I/O1 output valid time (Note 1)
Serial I/O2 output valid time (Note 1)
Serial I/O1 clock output rise time
Serial I/O1 clock output fall time
Serial I/O2 clock output rise time
Serial I/O2 clock output fall time
CMOS output rise time (Note 2)
CMOS output fall time (Note 2)
Test conditions
CL = 100 pF
Limits
Min.
tc(SCLK1)/2–50
tc(SCLK2)/2–50
tc(SCLK1)/2–50
tc(SCLK2)/2–50
–30
Typ.
20
Max.
350
50
Unit
ns
Notes 1: When bit 4 of the UART control register (address 001B16 or 003316) is “0”.
2: XOUT pin excluded.
100pF
CMOS output
Measurement output pin
100pF
N-channel open-drain output
Measurement output pin
1k