M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Rev.1.01
2003.07.16
page 20 of 170
Fig. 8.2.9 Internal State of Processor Status Register and Program Counter at Reset
b7
b0 b7
b0
1
Register
Processor status register (PS)
Bit allocation
State immediately after reset
Program counter (PCH)
Program counter (PCL)
Contents of address FFFF16
Contents of address FFFE16
I
ZC
D
B
T
V
N?
?
: Fix to this bit to “0”
(do not write to “1”)
:
<
Bit allocation>
<
State immediately after reset>
Function bit
: No function bit
: Fix to this bit to “1”
(do not write to “0”)
Name
:
: “0” immediately after reset
: Indeterminate immediately
after reset
0
1
?
: “1” immediately after reset
1
0