參數(shù)資料
型號： M37281EKSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-52
文件頁數(shù)： 28/172頁
文件大?。?/td> 1319K
代理商： M37281EKSP
Rev.1.01
2003.07.16
page 123 of 170
M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Power source voltage VCC, (See note 1)
Input voltage
CNVSS
Input voltage
P00–P07, P10–P17, P20–P27,
P30, P31, P40–P46, P64, P63,
P70–P72, XIN, HSYNC, VSYNC,
______
RESET
Output voltage
P00–P07, P10–P17, P20–P27,
P30, P31, P52–P55, SOUT, SCLK,
XOUT, OSC2
Circuit current
P52–P55, P10, P03, P15–P17,
P20–P27, P30, P31
Circuit current
P52–P57, P10, P03, P15–P17,
P20–P27, P65–P67, SOUT, SCLK
Circuit current
P11–P14
Circuit current
P00–P02, P04–P07
Circuit current
P30, P31
Power dissipation
Operating temperature
Storage temperature
Symbol
VCC, (AVCC)
VI
VO
IOH
IOL1
IOL2
IOL3
IOL4
Pd
Topr
Tstg
10. ABSOLUTE MAXIMUM RATINGS
Conditions
All voltages are
based on VSS.
Output transistors
are cut off.
Parametear
Ta = 25 °C
Unit
V
mA
mW
°C
Ratings
–0.3 to 6
–0.3 to VCC + 0.3
0 to 1 (See note 2)
0 to 2 (See note 3)
0 to 6 (See note 3)
0 to 1 (See note 3)
0 to 10 (See note 4)
550
–10 to 70
–40 to 125
Power source voltage (See note 1, 5), During CPU, OSD, data slicer operation
RAM hold voltage (when clock is stopped)
Power source voltage
HIGH input voltage
P00–P07, P10–P17, P20–P27, P30, P31,
P40–P46, P63, P64, P70–P72, HSYNC,
VSYNC, RESET, XIN
HIGH input voltage
SCL1, SCL2, SDA1, SDA2
LOW input voltage
P00–P07, P10–P17, P20–P27, P30, P31,
P40–P46, P63, P64, P70–P72
LOW input voltage
SCL1, SCL2, SDA1, SDA2
LOW input voltage (See note 7)
RESET, XIN, OSC1, HSYNC, VSYNC,
INT1–INT3, TIM2, TIM3, SCLK, SIN
HIGH average output current (See note 2)
P52–P55, P10, P03, P15–P17,
P20–P27, P30, P31
LOW average output current (See note 3)
P51–P55, P10, P03, P15–P17,
P20–P27, SOUT, SCLK
LOW average output current (See note 3)
P11–P14
LOW average output current (See note 3)
P00–P02, P04–P07
LOW average output current (See note 4)
P30, P31
Oscillation frequency (for CPU operation) (See note 6) XIN
Oscillation frequency (for sub-clock operation)
XCIN
Oscillation frequency (for OSD)
OSC1
Load resistance
During R,G,B analog output
Input frequency
TIM2, TIM3, INT1–INT3
Input frequency
SCLK
Input frequency
SCL1, SCL2
Input frequency
Horizontal sync. signal of video signal
Input amplitude video signal
CVIN
Limits
Min.
4.5
2.0
0
0.8VCC
0.7VCC
0
7.9
29
11.0
25.5
20.0
15.262
1.5
Typ.
5.0
0
8.0
32
26.5
15.734
2.0
Max.
5.5
0
VCC
0.4 VCC
0.3 VCC
0.2 VCC
1
2
6
1
10
8.1
35
27.0
27.5
100
1
400
16.206
2.5
V
mA
MHz
kHz
MHz
kHz
MHz
kHz
V
11. RECOMMENDED OPERATING CONDITIONS (Ta = –10 °C to 70 °C, VCC = 5 V ± 10 %, unless otherwise noted)
VCC, (AVCC)
VSS
VIH1
VIH2
VIL1
VIL2
VIL3
IOH
IOL1
IOL2
IOL3
IOL4
f(XIN)
f(XCIN)
fosc
RL
fhs1
fhs2
fhs3
fhs4
VI
Symbol
Parameter
Unit
LC oscillating mode
Ceramic oscillating mode
相關(guān)PDF資料
PDF描述
M37281MFH-XXXSP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP52
M37281MAH-XXXSP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP52
M37281MKH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
M37281MAH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
M37281MFH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
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參數(shù)描述
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