參數資料
型號： M37274MA-053SP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器
文件頁數： 124/147頁
文件大?。?/td> 2042K
代理商： M37274MA-053SP
124
MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
PRELIMINARY
Notice: This is not a final specification.
Some paramentic limits are subject to change.
Block Control Register i
Addresses 00D0
16
to
00DB
16
b7b6b5b4b3b2b1b0
Block control register i (BCi) (i=1 to 16) [Addresses 00D0
16
to 00DF
16
]
(See note 1)
Block Control register i
0, 1 Display mode
selection bits
(BCi0, BCi1)
Indeterminate
3, 4 Dot size selection
bits (BCi3, BCi4)
5, 6 Pre-divide ratio
layer selection bit
(BCi5, BCi6)
7
OUT2 output control bit
(BCi7) (See note 2)
b1
0
0
1
1
b0
0: Display OFF
1: OSD mode
0: CC mode
1: EXOSD mode
BC17: Window top boundary
BC27: Window bottom boundary
B
Name
Functions
After reset
R W
R W
Indeterminate
R W
Indeterminate
R W
Indeterminate
R W
2
Border control bit
(BCi2)
0: Border OFF
1: Border ON
Indeterminate
R W
Notes 1:
Note that MASK version the block control registers at addresses 00D0
16
to 00DB
16
when programming.
2:
Bit 4 of the color code 1 controls OUT1 output when bit 7 is "0".
Bit 4 of the color code 1 controls OUT2 output when bit 7 is "1".
3:
CS6 : Bit 6 of the clock control register (address 0216
16
)
4:
Tc : Pre-devided clock period for OSD
5:
H : Hsync
layer
ratio
0
0
1
1
0
0
1
1
0
0
1
1
—
—
0
0
1
1
0
1
0
1
1
1
2
3
1
2
1Tc
1/2H
1Tc
1H
2Tc
2H
3Tc
3H
1Tc
1/2H
1Tc
1H
2Tc
2H
3Tc
3H
1Tc
1/2H
1Tc
1H
2Tc
2H
3Tc
3H
1Tc
1/2H
1Tc
1H
1Tc
1/2H
1Tc
1H
1.5Tc
1/2H
1.5Tc
1H
0
0
1
1
1
Layer1
Layer2
—
—
—
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
b4 b3 CS6 Pre-divide Dot size Display
b6 b5
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