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參數(shù)資料
| 型號： | M34C02-RMM1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | 2 X 3 MM, VFDFPN-8 |
| 文件頁數(shù)： | 9/26頁 |
| 文件大?。?/td> | 388K |
| 代理商： | M34C02-RMM1 |
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M34C02
Table 16. AC Characteristics (M34C02-W, M34C02-L)
Note: 1. For a reSTART condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
Table 17. AC Characteristics (M34C02-R, M34C02-F)
Note: 1. For a reSTART condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL
Clock Frequency
400
kHz
tCHCL
tHIGH
Clock Pulse Width High
600
ns
tCLCH
tLOW
Clock Pulse Width Low
1300
ns
tDL1DL2 2
tF
SDA Fall Time
20
300
ns
tDXCX
tSU:DAT
Data In Set Up Time
100
ns
tCLDX
tHD:DAT
Data In Hold Time
0
ns
tCLQX
tDH
Data Out Hold Time
200
ns
tCLQV 3
tAA
Clock Low to Next Data Valid (Access Time)
200
900
ns
tCHDX 1
tSU:STA
Start Condition Set Up Time
600
ns
tDLCL
tHD:STA
Start Condition Hold Time
600
ns
tCHDH
tSU:STO
Stop Condition Set Up Time
600
ns
tDHDL
tBUF
Time between Stop Condition and Next Start Condition
1300
ns
tW
tWR
Write Time
10
ms
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL
Clock Frequency
100
kHz
tCHCL
tHIGH
Clock Pulse Width High
4000
ns
tCLCH
tLOW
Clock Pulse Width Low
4700
ns
tDL1DL2 2
tF
SDA Fall Time
20
300
ns
tDXCX
tSU:DAT
Data In Set Up Time
250
ns
tCLDX
tHD:DAT
Data In Hold Time
0
ns
tCLQX
tDH
Data Out Hold Time
200
ns
tCLQV 3
tAA
Clock Low to Next Data Valid (Access Time)
200
3500
ns
tCHDX 1
tSU:STA
Start Condition Set Up Time
4700
ns
tDLCL
tHD:STA
Start Condition Hold Time
4000
ns
tCHDH
tSU:STO
Stop Condition Set Up Time
4000
ns
tDHDL
tBUF
Time between Stop Condition and Next Start Condition
4700
ns
tW
tWR
Write Time
10
ms
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