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參數(shù)資料
| 型號： | M34C02-RMM1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封裝： | 2 X 3 MM, VFDFPN-8 |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 388K |
| 代理商： | M34C02-RMM1 |
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M34C02
Figure 8. Write Mode Sequences in a Non Write-Protected Area
Write Operations
Following a Start condition the bus master sends
a Device Select Code with the RW bit reset to 0.
The device acknowledges this, as shown in Figure
8, and waits for an address byte. The device re-
sponds to the address byte with an acknowledge
bit, and then waits for the data byte.
When the bus master generates a Stop condition
immediately after the Ack bit (in the “10th bit” time
slot), either at the end of a Byte Write or a Page
Write, the internal memory Write cycle is triggered.
A Stop condition at any other time slot does not
trigger the internal Write cycle.
During the internal Write cycle, Serial Data (SDA)
and Serial Clock (SCL) are ignored, and the de-
vice does not respond to any requests.
Byte Write
After the Device Select Code and the address
byte, the bus master sends one data byte. If the
addressed location is hardware write-protected,
the device replies to the data byte with NoAck, and
the location is not modified. If, instead, the ad-
dressed location is not Write-protected, the device
replies with Ack. The bus master terminates the
transfer by generating a Stop condition, as shown
in Figure 8.
Page Write
The Page Write mode allows up to 16 bytes to be
written in a single Write cycle, provided that they
are all located in the same page in the memory:
that is, the most significant memory address bits
are the same. If more bytes are sent than will fit up
to the end of the page, a condition known as ‘roll-
over’ occurs. This should be avoided, as data
starts to become overwritten in an implementation
dependent way.
The bus master sends from 1 to 16 bytes of data,
each of which is acknowledged by the device if
Write Control (WC) is Low. If the addressed loca-
tion is hardware write-protected, the device replies
to the data byte with NoAck, and the locations are
not modified. After each byte is transferred, the in-
ternal byte address counter (the 4 least significant
address bits only) is incremented. The transfer is
terminated by the bus master generating a Stop
condition.
STOP
START
BYTE WRITE
DEV SEL
BYTE ADDR
DATA IN
START
PAGE WRITE
DEV SEL
BYTE ADDR
DATA IN 1
DATA IN 2
AI01941
STOP
DATA IN N
ACK
R/W
ACK
R/W
ACK
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相關(guān)代理商/技術(shù)參數(shù) |
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| M34C02-RMN6T | 功能描述:電可擦除可編程只讀存儲器 5.5V 2K (256x8) RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| M34C02-W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect |
| M34C02-WBN6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Kbit Serial IC Bus EEPROM For DIMM Serial Presence Detect |
| M34C02-WDW1G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect |
| M34C02-WDW1P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect |
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