![](http://datasheet.mmic.net.cn/30000/M32176F3TFP_datasheet_2359466/M32176F3TFP_29.png)
1
1-15
OVERVIEW
32176 Group User’s Manual (Rev.1.01)
1.4 Pin Assignments
Table 1.4.1 Pin Assignments of the 32176 (2/4)
Port
Other than
port
Other than
port
-
Input/output
Function
-
Input/output
-
Input/output
-
Input/output
30
P04/DB4
P04
DB4
29
P03/DB3
P03
DB3
27
P01/DB1
P01
DB1
28
P02/DB2
Pin
No.
-
DB11
-
DB9
Input/output
37
P13/DB11
P13
Input/output
36
P12/DB10
P12
DB10
-
Input/output
35
P11/DB9
P11
-
Input/output
33
P07/DB7
34
P10/DB8
P10
DB8
P07
DB7
-
Input/output
-
Input/output
-
Input/output
32
P06/DB6
P06
DB6
31
P05/DB5
P05
DB5
P02
DB2
Symbol
Type
Pin State When Reset
Function
Type
State during
reset
State upon
exiting reset
During single-chip mode
P01
Input
Hi-z
During external extension and
processor modes
DB1
Input/output
Hi-z
During single-chip mode
P02
Input
Hi-z
During external extension and
processor modes
DB2
Input/output
Hi-z
During single-chip mode
P03
Input
Hi-z
During external extension and
processor modes
DB3
Input/output
Hi-z
During single-chip mode
P04
Input
Hi-z
During external extension and
processor modes
DB4
Input/output
Hi-z
During single-chip mode
P05
Input
Hi-z
During external extension and
processor modes
DB5
Input/output
Hi-z
During single-chip mode
P06
Input
Hi-z
During external extension and
processor modes
DB6
Input/output
Hi-z
During single-chip mode
P07
Input
Hi-z
During external extension and
processor modes
DB7
Input/output
Hi-z
During single-chip mode
P10
Input
Hi-z
During external extension and
processor modes
DB8
Input/output
Hi-z
During single-chip mode
P11
Input
Hi-z
During external extension and
processor modes
DB9
Input/output
Hi-z
During single-chip mode
P12
Input
Hi-z
During external extension and
processor modes
DB10
Input/output
Hi-z
During single-chip mode
P13
Input
Hi-z
During external extension and
processor modes
DB11
Input/output
Hi-z
Condition
42
VREF0
-
VREF0
--
43
AVCC0
-
AVCC0
--
44
AD0IN0
-
AD0IN0
-
Input
45
AD0IN1
-
AD0IN1
-
Input
46
AD0IN2
-
AD0IN2
-
Input
47
AD0IN3
-
AD0IN3
-
Input
48
AD0IN4
-
AD0IN4
-
Input
49
AD0IN5
-
AD0IN5
-
Input
50
AD0IN6
-
AD0IN6
-
Input
51
AD0IN7
-
AD0IN7
-
Input
52
AD0IN8
-
AD0IN8
-
Input
53
AD0IN9
-
AD0IN9
-
Input
54
AD0IN10
-
AD0IN10
-
Input
55
AD0IN11
-
AD0IN11
-
Input
56
AD0IN12
-
AD0IN12
-
Input
57
AD0IN13
-
AD0IN13
-
Input
58
AD0IN14
-
AD0IN14
-
Input
59
AD0IN15
-
AD0IN15
-
Input
-
DB13
Input/output
41
P17/DB15
P17
DB15
Input/output
40
P16/DB14
P16
DB14
-
Input/output
39
P15/DB13
P15
38
P14/DB12
P14
DB12
-
Input/output
During single-chip mode
P14
Input
Hi-z
During external extension and
processor modes
DB12
Input/output
Hi-z
During single-chip mode
P15
Input
Hi-z
During external extension and
processor modes
DB13
Input/output
Hi-z
During single-chip mode
P16
Input
Hi-z
During external extension and
processor modes
DB14
Input/output
Hi-z
During single-chip mode
P17
Input
Hi-z
During external extension and
processor modes
DB15
Input/output
Hi-z
VREF0
---
AVCC0
---
AD0IN0
Input
Hi-z
AD0IN1
Input
Hi-z
AD0IN2
Input
Hi-z
AD0IN3
Input
Hi-z
AD0IN4
Input
Hi-z
AD0IN5
Input
Hi-z
AD0IN6
Input
Hi-z
AD0IN7
Input
Hi-z
AD0IN8
Input
Hi-z
AD0IN9
Input
Hi-z
AD0IN10
Input
Hi-z
AD0IN11
Input
Hi-z
AD0IN12
Input
Hi-z
AD0IN13
Input
Hi-z
AD0IN14
Input
Hi-z
AD0IN15
Input
Hi-z