
6
6-7
Rev.1.0
(4) WRERR2 (program operating status 2) bit (D12)
The WRERR2 bit is used to determine whether an error occurred after the CPU has finished
programming the flash memory. The programming operation terminated normally when
WRERR2 = 0 or terminated in an error when WRERR2 = 1.
The condition for which this bit is set to 1 is that even when the write operation was executed a
specified number of times repeatedly, the flash memory could not be programmed.
Note: This status register is provided within the flash memory, so that by writing a read status
command (H'7070) to any address of the internal flash memory, this register is enabled
for readout. For details, refer to Section 6.5, "Programming the Internal Flash Memory."
INTERNAL MEMORY
6.4 Internal Flash Memory Related Registers