9
9-35
Rev.1.0
9.2.8 DMA Interrupt Mask Registers
s DMA0-4 Interrupt Mask Register (DM04ITMK)
<Address: H'0080 0401>
D8
9
10111213
14
D15
DMITMK4 DMITMK3 DMITMK2 DMITMK1 DMITMK0
<When reset: H'00>
D
Bit Name
Function
R
W
8-10
No functions assigned
0
–
11
DMITMK4
0: Enables interrupt request
(DMA4 interrupt request mask)
1: Masks (disables) interrupt request
12
DMITMK3
(DMA3 interrupt request mask)
13
DMITMK2
(DMA2 interrupt request mask)
14
DMITMK1
(DMA1 interrupt request mask)
15
DMITMK0
(DMA0 interrupt request mask)
The DMA0-4 Interrupt Mask Register masks interrupt requests on DMA channels 0-4.
DMITMKn (DMAn interrupt request mask) bits (n = 0-4)
Setting the DMAn interrupt request mask bit to 1 masks a DMAn interrupt request. However,
whenever an interrupt request occurs, the DMAn interrupt request status bit is set to 1 no matter
how this register is set.
DMAC
9.2 DMAC Related Registers