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參數(shù)資料
| 型號： | M32000D3FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片32位CMOS微機(jī) |
| 文件頁數(shù)： | 26/45頁 |
| 文件大小： | 565K |
| 代理商： | M32000D3FP |
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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D3FP
26
Master/slave mode
The M32000D3FP has an M/S (master/slave) pin for multiprocessor
configuration use.
master mode (M/S = "H")
This is normal operation mode. Set the M/S pin to an "H" level. It is
used when the M32000D3FP is used as the main CPU in a system.
slave mode (M/S = "L")
This operation mode is for when the M32000D3FP is used as a
coprocessor. Set the M/S pin to an "L" level. When set to slave mode,
the M32000D3FP does not start operation even after a reset, until an
interrupt request or the SBI is input. Processing is carried out by
communicating with the master M32000D3FP, using the two pro-
grammable I/O ports and the external interrupt signal.
Coprocessor only configuration example
The slave M32000D3FP accesses only the internal DRAM and never
the external bus. M/S and HREQ are fixed at the "L" level. The slave
M32000D3FP executes the instructions that the master M32000D3FP
downloads to the internal DRAM. The data transfer request (process-
ing complete) from the slave M32000D3FP is notified to the master
M32000D3FP by inputting the interrupt request via the programmable
I/O port. The data transaction is carried out when the master
M32000D3FP accesses the internal DRAM in the slave M32000D3FP.
Common bus coprocessor configuration example
In this configuration, the slave M32000D3FP can also access the
external bus. Communications between the master and slave CPUs
is carried out using the programmable I/O ports and the interrupt
request input.
D24
D25
D26
D27
D28
D29
D30
D31
LM
lock control register (MLCR) < address: H'FFFF FFF7>
Fig. 26 Lock control register
M32000D3FP
(master)
ROM
ASIC
PP0
M/S
M/S
HREQ
INT
M32000D3FP
(slave)
HACK
HREQ
HACK
INT
bus
arbiter
M32000D3FP
(master)
ROM
ASIC
INT
PP0
M/S
M/S
HREQ
INT
M32000D3FP
(slave)
no access to
external bus
<coprocessor only configuration>
<common bus coprocessor configuration>
Fig. 27 Master/slave system configuration example
0: HREQ
exclusive
lock mode
___
1: CS exclusive
lock mode
R = 0 ... "0" when reading
W =
... write enabled
R =
W =
... read enabled
: write disabled
<at reset: H'00>
R
0
D
24 - 30
bit name
Not
assigned.
function
W
31
LM
(lock mode)
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