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參數(shù)資料
| 型號(hào)： | M30201MX-XXXFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁數(shù)： | 24/159頁 |
| 文件大?。?/td> | 1496K |
| 代理商： | M30201MX-XXXFP |
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Clock Generating Circuit
Status Transition of BCLK
Unde
deeopmen
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
24
0
1
1
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
Invalid
Invalid
Invalid
Invalid
Invalid
1
1
Division by 2 mode
Division by 4 mode
Division by 8 mode
Division by 16 mode
No-division mode
Low-speed mode
Low power dissipation mode
Invalid
1
0
Invalid
Invalid
Invalid
1
0
Invalid
Invalid
Invalid
Invalid
Status Transition of BCLK
Power dissipation can be reduced and low-voltage operation achieved by changing the count source for
BCLK. Table 1.6 shows the operating modes corresponding to the settings of system clock control regis-
ters 0 and 1.
When reset, the device starts in division by 8 mode. The main clock division select bit 0(bit 6 at address
0006
16
) changes to “1” when shifting from high-speed/medium-speed to stop mode and at a reset. When
shifting from low-speed/low power dissipation mode to stop mode, the value before stop mode is retained.
The following shows the operational modes of BCLK.
(1) Division by 2 mode
The main clock is divided by 2 to obtain the BCLK.
(2) Division by 4 mode
The main clock is divided by 4 to obtain the BCLK.
(3) Division by 8 mode
The main clock is divided by 8 to obtain the BCLK. When reset, the device starts operating from this
mode. Before the user can go from this mode to no division mode, division by 2 mode, or division by 4
mode, the main clock must be oscillating stably. When going to low-speed or lower power consumption
mode, make sure the sub-clock is oscillating stably.
(4) Division by 16 mode
The main clock is divided by 16 to obtain the BCLK.
(5) No-division mode
The main clock is divided by 1 to obtain the BCLK.
(6) Low-speed mode
f
C
is used as BCLK. Note that oscillation of both the main and sub-clocks must have stabilized before
transferring from this mode to another or vice versa. At least 2 to 3 seconds are required after the sub-
clock starts. Therefore, the program must be written to wait until this clock has stabilized immediately
after powering up and after stop mode is cancelled.
(7) Low power dissipation mode
f
C
is the BCLK and the main clock is stopped.
CM17
CM16
CM07
CM06
CM05
CM04
Operating mode of BCLK
Table 1.6. Operating modes dictated by settings of system clock control registers 0 and 1
Note : Before the count source for BCLK can be changed from X
IN
to X
CIN
or vice versa, the clock to which
the count source is going to be switched must be oscillating stably. Allow a wait time in software for
the oscillation to stabilize before switching over the clock.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30201MX-XXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30201T-52SP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Converter for Connecting Pod Probe M30201T-PRB to 52-pin 1.778mm-pitch SDIP (for M30201 Group) |
| M30201T-56FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Converter for Connecting Pod Probe M30201T-PRB to 56-pin 0.65mm-pitch QFP (for M30201 Group) |
| M30201T-PRB | 制造商:Renesas Electronics Corporation 功能描述:POD PROBE FOR M16C/20 GROUP - Bulk |
| M3021-000002-017BG | 功能描述:Pressure Sensor 246.56 PSI (1700 kPa) Vented Gauge Male - 1/4" (6.35mm) BSPP 0 mV ~ 100 mV (5V) Cylinder 制造商:te connectivity measurement specialties 系列:MSP300 零件狀態(tài):有效 壓力類型:排氣式壓力計(jì) 工作壓力:246.56 PSI（1700 kPa） 輸出類型:模擬電壓 輸出:0 mV ~ 100 mV（5V） 精度:±1% 電壓 - 電源:5V 端口尺寸:公型 - 1/4"（6.35mm） BSPP 端口樣式:有螺紋 特性:溫度補(bǔ)償 端子類型:導(dǎo)線引線 最高壓力:493.13 PSI（3400 kPa） 工作溫度:-20°C ~ 85°C 封裝/外殼:圓柱型 供應(yīng)商器件封裝:- 標(biāo)準(zhǔn)包裝:1 |
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