參數(shù)資料
型號: M30201F2-FP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP56
封裝: PLASTIC, QFP-56
文件頁數(shù): 132/158頁
文件大小: 1633K
代理商: M30201F2-FP
75
Under
development
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Serial I/O
Figure 1.69. Block diagram of UARTi (i = 0, 1)
Serial I/O
Serial I/O is configured as two channels: UART0 and UART1.
UART0 and UART1 each have an exclusive timer to generate a transfer clock, so they operate indepen-
dently of each other.
Figure 1.69 shows the block diagram of UART0 and UART1. Figure 1.70 shows the block diagram of the
transmit/receive unit.
UART0 has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous serial I/
O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses 03A016 and
03A816) determine whether UART0 is used as a clock synchronous serial I/O or as a UART.
UART1 is used as a UART only.
Figures 1.71 through 1.73 show the registers related to UARTi.
RxD0
1 / (m+1)
1/2
Bit rate generator
Clock synchronous type
(when internal clock is selected)
UART reception
Clock synchronous type
UART transmission
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
Receive
clock
Transmit
clock
CLK0
Clock source selection
f1
f8
f32
Reception
control circuit
Transmission
control circuit
Internal
External
TxD0
Transmit/
receive
unit
RxD1
1 / (n+1)
Bit rate generator
Receive
clock
Transmit
clock
Clock source selection
f1
f8
f32
Reception
control circuit
Transmission
control circuit
TxD1
(UART1)
(UART0)
CLK
polarity
reversing
circuit
Transmit/
receive
unit
1/16
fC
1/16
m : Values set to UART0 bit rate generator (BRG0)
n : Values set to UART1 bit rate generator (BRG1)
Clock output pin
select switch
CLKS
fC
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