參數(shù)資料
型號(hào): M2V56S30ATP-6
元件分類: DRAM
英文描述: 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 X 0.875 INCH, TSOP2-54
文件頁數(shù): 15/51頁
文件大?。?/td> 430K
代理商: M2V56S30ATP-6
22
MITSUBISHI ELECTRIC
May '02
MITSUBISHI LSIs
SDRAM (Rev.1.41)
Single Data Rate
M2V56S20/ 30/ 40 AKT
256M Synchronous DRAM
M2V56S20/ 30/ 40 ATP
CLK
Command
DQ
Command
DQ
Command
DQ
Command
DQ
Command
DQ
Command
DQ
CL=2
CL=3
[ Read Interrupted by Burst Terminate ]
Similarly to the precharge, a burst terminate command can interrupt the burst read operation and
disable the data output. The terminated bank remains active. READ to TBST interval is minimum 1
CLK. A TBST command to output disable latency is equivalent to the /CAS Latency.
TBST
READ
Q0
Q1
Q2
TBST
READ
Q0
Q1
TBST
READ
Q0
TBST
READ
Q0
Q1
Q2
TBST
READ
Q0
Q1
TBST
READ
Q0
Read Interrupted by Burst Terminate (BL=4)
相關(guān)PDF資料
PDF描述
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6000406 4 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6001106 11 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6011006 20 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6011506 30 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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M2V56S30ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S30TP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S30TP-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S30TP-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM