參數(shù)資料
型號(hào)： M2V28S40ATP-8
廠商： Mitsubishi Electric Corporation
英文描述： 128M Synchronous DRAM
中文描述： 128M的同步DRAM
文件頁(yè)數(shù)： 20/52頁(yè)
文件大?。?/td> 639K
代理商： M2V28S40ATP-8
M2V28S20TP-6,-7,-8
M2V28S30TP-6,-7,-7L,-8,-8L
M2V28S40TP-7,-7L,-8,-8L
Jun. '99
MITSUBISHI LSIs
SDRAM (Rev. 1.0E)
128M Synchronous DRAM
(4-BANK x 8,388,608-WORD x 4-BIT)
(4-BANK x 4,194,304-WORD x 8-BIT)
(4-BANK x 2,097,152-WORD x 16-BIT)
20
WRITE
After tRCD from the bank activation, a WRITE command can be issued. 1st input data is set
at the same cycle as the WRITE. Following (BL -1) data are written into the RAM, when the Burst
Length is BL. The start address is specified by A0-A9,A11(x4), A0-9(X8), A0-8(X16) and the
address sequence of burst data is defined by the Burst Type. A WRITE command may be applied to
any active bank, so the row precharge time (tRP) can be hidden behind continuous input data by
interleaving the multiple banks. From the last input data to the PRE command, the write recovery time
(tWR) is required. When A10 is high at a WRITE command, the autoprecharge (WRITEA) is
performed. Any command (READ, WRITE, PRE, ACT) to the same bank is inhibited till the internal
precharge is complete. The internal precharge begins at tWR after the last input data cycle. (Need to
keep tRAS min.) The next ACT command can be issued after tRP from the internal precharge timing.
WRITE with Auto-Precharge (BL=4)
tWR
CLK
Command
A0-9
A10
BA0,1
DQ
ACT
Xa
Xa
00
Write
Y
1
00
Da0
Da1
Da2
Da3
tRCD
ACT
Xa
Xa
00
Internal precharge starts
tRP
A11
Xa
Xa
Multi Bank Interleaving WRITE (BL=4)
CLK
Command
A0-9
A10
BA0,1
DQ
ACT
Xa
00
Write
Y
00
Write
Y
0
0
10
Da0
ACT
Xb
Xb
10
0
10
tRCD
tRCD
PRE
Xa
A11
Xb
0
Xa
0
00
PRE
0
Da1
Da2
Da3
Db0
Db1
Db2
Db3
相關(guān)PDF資料
PDF描述
M2V28S40ATP-8L 128M Synchronous DRAM
M2V28S40TP 128M Synchronous DRAM
M2V28S40TP-7L 128M Synchronous DRAM
M2V28S40TP-8 CA-BAYONET
M2V28S40TP-8L 128M Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2V28S40ATP-8L 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S40TP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S40TP-6 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S40TP-7 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S40TP-7L 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*