參數(shù)資料
型號： M. CORE
廠商： Motorola, Inc.
元件分類： 32位微控制器
英文描述： Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述： 高度集成，低功耗，32位微控制器
文件頁數(shù)： 5/6頁
文件大小： 57K
代理商： M. CORE
MOTOROLA
MCORE ARCHITECTURAL INFORMATION
5
MCORE SIGNAL GROUPS
The MCORE signal groups are referenced in Figure 2.
Figure 2.
MCORE Signal Groups
MORE INFORMATION
For more information on the MCORE architecture please contact your local sales office or MCORE Market
Development at (512) 342-6974
TRANSFER REQUEST (TREQ)
ADDRESS (A31-0)
TRANSFER SIZE (TSIZ1-0)
SYSTEM CLOCKS
DATA (D31-0)
TRANSFER ACK. (TA)
TRANSFER ERROR ACK (TEA)
INTERRUPT REQUESTS
AUTOVECTOR (AVEC)
JTAG / COP
TEST
1
32
1
1
2
1
5
32
3
2
2
DATA
TRANSFER
TRANSFER
TERMINATION/
STATUS
INTERRUPTS
AND RESET
JTAG / COP
INTERFACE
LSSD TEST
CONTROL
TRANSFER
REQUEST
TRANSFER
BUSY
ADDRESS
BUS
CLOCKS
MCORE
TM
TRANSFER CODE (TC2-0)
TEST CLOCKS
2
INTERRUPT VECTOR #
7
1
READ/WRITE (R/W)
TRANSFER
ATTRIBUTES
GLOBAL STATUS (GSB31-0)
32
32
GLOBAL
STATUS/CONTROL
GLOBAL CONTROL (GCB31-0)
INT PENDING (IPEND)
1
PROCESSOR
STATE
PSTAT4-0
5
RESETS (RST, SRST)
2
1
TRANSLATE CONTROL(TE)
MEMORY
MANAGEMENT
2
LPMD1-0
POWER
MANAGEMENT
SEQUENTIAL (SEQ)
1
EMULATION
SUPPORT
~52
HARDWARE
ACCELERATOR
INTERFACE
DEBUG REQUEST (DBGRQ)
DEBUG ACK (DBUG)
1
1
BREAKPT REQUEST (BRKRQ)
1
TRANSFER BUSY (TBUSY)
1
1
ABORT CYCLE (ABORT))
TRANSFER
ABORT
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