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參數(shù)資料
| 型號(hào)： | LUC4AB01 |
| 廠商： | Lineage Power |
| 英文描述： | ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM)) |
| 中文描述： | 緩沖區(qū)管理器自動(dòng)柜員機(jī)（ABM）的（自動(dòng)柜員機(jī)緩沖管理器（反導(dǎo)條約）） |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | LUC4AB01 |
Lucent Technologies Inc.
7
Advance Product Brief
March 1997
ATM Buffer Manager (ABM)
LUC4AB01
S
LUCENT TECHNOLOGIES—PROPRIETARY
Use pursuant to Company Instructions
Description
(continued)
Egress Queue Processor (EQP)
(continued)
Transmission of Data from the Cell Data RAM to the
MPHY Ports
The EQP schedules cells for transmission to the MPHY
ports using a two-level round-robin selection process
similar to the IQP. However, instead of a strict round-
robin order, the MPHY port queues are serviced using
a programmable weighted round-robin rate scheduler.
Each entry in the table specifies the MPHY port queue
number to be serviced (or a no cell read value). The
MPHY port output rate is determined by the frequency
at which a particular MPHY port appears in the sched-
ule. If the scheduled queue is empty, then no cell is ser-
viced in that time slot. The egress MPHY port rate
scheduler is located in the PERR block of the pointer
RAM. The pointer to this schedule is incremented once
per time slot.
Once a MPHY port queue is chosen, one of its four
delay priority subqueues is selected. A programmable
weighted round-robin schedule is used to determine
how frequently each delay priority in a queue is read.
There is a separate weighted round-robin schedule for
each queue that is independently configurable by the
microprocessor. Each schedule provides a 16-entry
(weight) table to determine the sequence of delay prior-
ities to be serviced and therefore the fraction of total
bandwidth allocated to each delay priority. If a cell is
available from the subqueue chosen by the weighted
round-robin schedule, then that cell is taken. Other-
wise, the highest nonempty delay priority subqueue is
chosen.
For the chosen subqueue, a cell is read from the
egress buffer and the released IP is returned to the IP
free list. The EQP compares the subqueue length
against the applicable egress thresholds (EFCI,
SEFCI, LCI, and LNI). If a threshold is exceeded, then
the appropriate field in the cell header is marked. Vari-
ous individual statistic counters are updated. Depend-
ing on the cell type (user data or RM), the subqueue
length or the total egress buffer occupancy is inserted
into the cell local header. The cell is then forwarded to
UTOP. If this is the last MPHY port queue linked to a
multicast cell, then the cell buffer is returned to the
egress free list.
Pointer RAM Interface (PRI)
The PRI handles all the necessary operations needed
to read and write the pointer RAM.
Cell Data RAM Interface (DRI)
The DRI handles all the necessary operations needed
to read and write the cell data RAM.
Microprocessor Interface (MPI)
The MPI allows an external processor to access the
ABM for configuration, maintenance, statistics, and
internal and external pointer memory reads and writes.
It provides a 16-bit asynchronous interface to
Motorola
, or generic microprocessors. It also generates
an interrupt when status bits are set.
Intel
,
Test Access Port (TAP)
The ABM incorporates logic to support a standard
5-pin access port compatible with
dard (JTAG) used for boundary scan. TAP contains
instruction registers, data registers, and control logic. It
is controlled externally by a JTAG bus master. The TAP
gives the ABM board-level test capability.
IEEE
P1149.1 stan-
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LUC4AB01388BAC4-DB | 制造商:Agere Systems 功能描述: |
| LUC4AB01BAC4DB | 制造商:LUCENT 功能描述:* |
| LUC4AS01-BC7-DB | 制造商:Agere Systems 功能描述: |
| LUC4AU01SC5DB | 制造商:LUCENT 功能描述:* |
| LUC4AU01-SC5-DB | 制造商:Agere Systems 功能描述: |
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