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參數(shù)資料
| 型號： | LUC4AB01 |
| 廠商： | Lineage Power |
| 英文描述： | ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM)) |
| 中文描述： | 緩沖區(qū)管理器自動柜員機（ABM）的（自動柜員機緩沖管理器（反導(dǎo)條約）） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 182K |
| 代理商： | LUC4AB01 |
2
Lucent Technologies Inc.
Advance Product Brief
March 1997
ATM Buffer Manager (ABM)
LUC4AB01
S
LUCENT TECHNOLOGIES—PROPRIETARY
Use pursuant to Company Instructions
Description
Figure 1 shows the architecture of an ATM switch that
uses the ATLANTA chip set. The highly sophisticated
LUC4AB01 ATM Buffer Manager (ABM) chip provides
efficient queue management through the use of innova-
tive queuing and thresholding/congestion algorithms.
ATM cells are received over a UTOPIA II Plus interface
(ingress_rx data path) and queued in an ingress buffer
pool located in external memory. Here, they are sched-
uled to be transmitted to an external switch fabric
(ingress_tx data path). Alternatively, if the ABM is con-
figured to operate in stand-alone shared memory
switch mode (no external switch fabric is present), the
cells are transferred internally to the egress buffer pool.
5-4554r9
Figure 1. Architecture of an ATM Switch Using the ATLANTA Chip Set
ALM
LUC4AU01
MICROPROCESSOR
INTERFACE
SRAM
LINE CARD #1
#1
#1
#1
LINE CARD #N
N x N SWITCH FABRIC
#N
#N
B
R
ABM
LUC4AB01
SRAM
PHYSICAL LAYER
INTERFACE (MPHY)
ALM
LUC4AU01
SRAM
ABM
LUC4B01
SRAM
ASX
LUC4AS01
ACE
LUC4AC01
ASX
LUC4AS01
ASX
LUC4AS01
ACE
LUC4AC01
ASX
LUC4AS01
#1
#1
N x N REDUNDANT SWITCH FABRIC
#N
ASX
LUC4AS01
ACE
LUC4AC01
ASX
LUC4AS01
ASX
LUC4AS01
ACE
LUC4AC01
ASX
LUC4AS01
#1
#1
#N
INGRESS DIRECTION
EGRESS DIRECTION
#1
#N
#N
#N
#N
1
M
PHY PORTS
1
M
PHY PORTS
MICROPROCESSOR
INTERFACE
MICROPROCESSOR
INTERFACE
MICROPROCESSOR
INTERFACE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LUC4AB01388BAC4-DB | 制造商:Agere Systems 功能描述: |
| LUC4AB01BAC4DB | 制造商:LUCENT 功能描述:* |
| LUC4AS01-BC7-DB | 制造商:Agere Systems 功能描述: |
| LUC4AU01SC5DB | 制造商:LUCENT 功能描述:* |
| LUC4AU01-SC5-DB | 制造商:Agere Systems 功能描述: |
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