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參數(shù)資料
| 型號： | LUC4AB01 |
| 廠商： | Lineage Power |
| 英文描述： | ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM)) |
| 中文描述： | 緩沖區(qū)管理器自動柜員機（ABM）的（自動柜員機緩沖管理器（反導(dǎo)條約）） |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 182K |
| 代理商： | LUC4AB01 |
Lucent Technologies Inc.
3
Advance Product Brief
March 1997
ATM Buffer Manager (ABM)
LUC4AB01
S
LUCENT TECHNOLOGIES—PROPRIETARY
Use pursuant to Company Instructions
Description
(continued)
ATM cells received from the switch fabric (egress_rx
data path) are queued in the egress buffer pool also
located in external memory. Here, they are scheduled
to be transmitted over the UTOPIA II Plus interface
toward MPHY ports.
The ABM processes cells on a time-slot (cell time)
basis. The ABM is capable of receiving and transmit-
ting one ingress cell and one egress cell each time
slot.
A block diagram and a brief description of the function-
ality of each block follows.
5-4694r5
Figure 2. ABM Block Diagram
IRSOC
IRCLKN
IRCLKP
EWDATA[7:0]
EWPRTY
INGRESS_TX
EGRESS_RX
EGRESS_RX
INGRESS_TX
SWITCH FABRIC
INTERFACE
P
P
IRDATA[7:0]
IRPRTY
EWSOC
EWCLKN
EWCLKP
RIRDATA[7:0]
RIRPRTY
INGRESS
QUEUE
PROCESSOR
EGRESS
QUEUE
PROCESSOR
JTAG
MICROPROCESSOR
INTERFACE
CELL DATA RAM
INTERFACE
POINTER RAM
INTERFACE
CONTROL
EGRESS_TX
INGRESS_RX
UTOPIA II
PLUS
INTERFACE
IWSOC
IWCLAV
IWDATA[15:0]
IWPRTY
IWENBN
IWADDR[4:0]
IWCLK
ERCLAV
ERDATA[15:0]
ERPRTY
ERENBN
ERADDR[4:0]
ERCLK
RIRSOC
RIRCLKN
RIRCLKP
REWDATA[7:0]
REWPRTY
REWSOC
REWCLKN
REWCLKP
GTSYNC
GOE
GRST
GCLK
M
M
M
M
M
M
M
M
M
T
T
T
T
T
P
P
P
P
P
D
D
D
D
D
T
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|---|---|
| LUC4AC01 | ATM Crossbar Element (ACE)(ATM縱橫元件（ACE）) |
| LUC4AS01 | ATM Switch Element (ASX)(ATM開關(guān)元件) |
| LUC4AU01 | ATM Layer UNI Manager (ALM)(ATM 層UNI管理器(ALM)) |
| LVSP60 | Blade Terminal & Special Purpose Fuses - Surge Fuses |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LUC4AB01388BAC4-DB | 制造商:Agere Systems 功能描述: |
| LUC4AB01BAC4DB | 制造商:LUCENT 功能描述:* |
| LUC4AS01-BC7-DB | 制造商:Agere Systems 功能描述: |
| LUC4AU01SC5DB | 制造商:LUCENT 功能描述:* |
| LUC4AU01-SC5-DB | 制造商:Agere Systems 功能描述: |
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