參數(shù)資料
型號(hào): LTC3860IUH#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: DUAL SWITCHING CONTROLLER, 1250 kHz SWITCHING FREQ-MAX, PQCC32
封裝: 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32
文件頁(yè)數(shù): 13/36頁(yè)
文件大?。?/td> 436K
代理商: LTC3860IUH#PBF
LTC3860
20
3860fc
APPLICATIONS INFORMATION
A multiphase power supply signicantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is divided by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
than the number of phases used times the output volt-
age). The output ripple amplitude is also reduced by the
number of phases used. Figure 8 graphically illustrates
the principle.
3860 F08
SW1 V
ICIN
ICOUT
SINGLE PHASE
SW1 V
SW2 V
ICIN
IL2
IL1
ICOUT
DUAL PHASE
RIPPLE
Figure 8. Single and 2-Phase Current Waveforms
DUTY FACTOR (VOUT/VIN)
0.1
DI
C(P-P)
V
O
/L
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.3
0.5
0.6
3860 F09
0.2
0.4
0.7
0.8
0.9
1 PHASE
2 PHASE
Figure 9. Normalized Output Ripple Current
vs Duty Factor [IRMS” 0.3 (DIC(PP))]
0
0.1
0.2
0.3
0.4
3860 F10
0.5
0.6
DUTY FACTOR (VOUT/VIN)
0.1
RMS
INPUT
RIPPLE
CURRENT
DC
LOAD
CURRENT
0.3
0.5
0.6
0.2
0.4
0.7
0.8
0.9
1 PHASE
2 PHASE
Figure 10. Normalized RMS Input Ripple Current
vs Duty Factor for 1 and 2 Output Stages
The worst-case RMS ripple current for a single stage de-
sign peaks at an input voltage of twice the output voltage.
The worst case RMS ripple current for a two stage design
results in peak outputs of 1/4 and 3/4 of input voltage.
When the RMS current is calculated, higher effective duty
factor results and the peak current levels are divided as
long as the current in each stage is balanced. Refer to
Application Note 19 for a detailed description of how
to calculate RMS current for the single stage switching
regulator. Figures 9 and 10 illustrate how the input and
output currents are reduced by using an additional phase.
For a 2-phase converter, the input current peaks drop in
half and the frequency is doubled. The input capacitor
requirement is thus reduced theoretically by a factor of
four! Just imagine the possibility of capacitor savings
with even higher number of phases!
Output Current Sharing
When multiple LTC3860s are daisychained to drive a com-
mon load, accurate output current sharing is essential to
achieve optimal performance and efciency. Otherwise,
if one stage is delivering more current than another, then
the temperature between the two stages will be different,
and that could translate into higher switch RDS(ON), lower
efciency, and higher RMS ripple. When the COMP and IAVG
pins of multiple LTC3860s are tied together, the amount
of output current delivered from each LTC3860 is actively
balanced by the IAVE loop. The SGND pins of the multiple
LTC3860s must be kelvined to the same point for optimal
current sharing.
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