參數(shù)資料
型號: LTC3858EUH-2#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PQCC32
封裝: 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32
文件頁數(shù): 39/40頁
文件大?。?/td> 432K
代理商: LTC3858EUH-2#PBF
LTC3858-2
8
38582f
PIN FUNCTIONS
SENSE1, SENSE2(Pin 1, Pin 9): The (–) Input to the
Differential Current Comparators. When greater than
INTVCC – 0.5V, the SENSEpin supplies current to the
current comparator.
FREQ (Pin 2): The Frequency Control Pin for the Internal
Voltage-Controlled Oscillator (VCO). Connecting this pin
to GND forces the VCO to a fixed low frequency of 350kHz.
Connecting this pin to INTVCC forces the VCO to a fixed high
frequency of 535kHz. Other frequencies between 50kHz
and 900kHz can be programmed using a resistor between
FREQ and GND. An internal 20μA pull-up current develops
the voltage to be used by the VCO to control the frequency
PHASMD (Pin 3): Control input to phase selector which
determines the phase relationships between controller 1,
controller 2 and the CLKOUT signal. Pulling this pin to
ground forces TG2 and CLKOUT to be out of phase 180°
and 60° with respect to TG1. Connecting this pin to IN-
TVCC forces TG2 and CLKOUT to be out of phase 240° and
120° with respect to TG1. Floating this pin forces TG2 and
CLKOUT to be out of phase 180° and 90° with respect to
TG1. Refer to the Table 1.
CLKOUT (Pin 4): Output clock signal available to daisy-
chain other controller ICs for additional MOSFET driver
stages/phases. The output levels swing from INTVCC to
ground.
PLLIN/MODE (Pin 5): External Synchronization Input to
Phase Detector and Forced Continuous Mode Input. When
an external clock is applied to this pin, the phase-locked
loop will force the rising TG1 signal to be synchronized
with the rising edge of the external clock. When not syn-
chronizing to an external clock, this input, which acts on
both controllers, determines how the LTC3858-2 operates
at light loads. Pulling this pin to ground selects Burst Mode
operation. An internal 100k resistor to ground also invokes
Burst Mode operation when the pin is floated. Tying this pin
to INTVCC forces continuous inductor current operation.
Tying this pin to a voltage greater than 1.2V and less than
INTVCC – 1.3V selects pulse-skipping operation.
SGND (Pin 6, Exposed Pad Pin 33): Small-signal ground
common to both controllers, must be routed separately
from high current grounds to the common (–) terminals
of the CIN capacitors. The exposed pad must be soldered
to the PCB for rated thermal performance.
RUN1, RUN2 (Pin 7, Pin 8): Digital Run Control Inputs for
Each Controller. Forcing either of these pins below 1.2V
shuts down that controller. Forcing both of these pins
below 0.7V shuts down the entire LTC3858-2, reducing
quiescent current to approximately 8μA.
ILIM (Pin 28): Current Comparator Sense Voltage Range
Inputs. Tying this pin to SGND, FLOAT or INTVCC sets the
maximum current sense threshold to one of three different
levels for both comparators.
相關(guān)PDF資料
PDF描述
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